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It has been researched and developed in the last decade, with researchers providing better architectural designs which address the technology's main challenges\u2014its limited write endurance, potential long latency, high energy writes, power dissipation, and some concerns for memory privacy. Some physical properties of the technology are also discussed, providing a basis for architectural discussions. Also briefly shown are other architectural alternatives, such as FeRAM and MRAM. The designs surveyed in this article include read before write, wear leveling, write cancellation, write pausing, some encryption schemes, and buffer organizations. These allow PCM to stand on its own as a replacement for DRAM as main memory. Designs for hybrid memory systems with both PCM and DRAM are also shown and some designs for SSDs incorporating PCM.<\/jats:p>","DOI":"10.1145\/2480741.2480746","type":"journal-article","created":{"date-parts":[[2013,7,1]],"date-time":"2013-07-01T12:27:28Z","timestamp":1372681648000},"page":"1-33","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":49,"title":["Phase-change memory"],"prefix":"10.1145","volume":"45","author":[{"given":"Omer","family":"Zilberberg","sequence":"first","affiliation":[{"name":"Tel-Aviv University, Israel"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Shlomo","family":"Weiss","sequence":"additional","affiliation":[{"name":"Tel-Aviv University, Israel"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Sivan","family":"Toledo","sequence":"additional","affiliation":[{"name":"Tel-Aviv University, Israel"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2013,7,3]]},"reference":[{"key":"e_1_2_1_1_1","unstructured":"Atwood G. 2010. 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J., Appelbaum, J., and Felten, E. W. 2008. Lest we remember: Cold boot attacks on encryption keys. In Proceedings of the 17th Conference on Security Symposium. 45--60."},{"key":"e_1_2_1_16_1","first-page":"33","article-title":"Spin-transfer torque MRAM (STT-MRAM) challenges and prospects","volume":"18","author":"Huai Y.","year":"2008","unstructured":"Huai , Y. 2008 . Spin-transfer torque MRAM (STT-MRAM) challenges and prospects . AAPPS Bulle. 18 , 6, 33 -- 40 . Huai, Y. 2008. Spin-transfer torque MRAM (STT-MRAM) challenges and prospects. AAPPS Bulle. 18, 6, 33--40.","journal-title":"AAPPS Bulle."},{"key":"e_1_2_1_17_1","volume-title":"Proceedings of the IEEE International Electron Devices Meeting (IEDM'07)","author":"Ielmini D.","unstructured":"Ielmini , D. , Lavizzari , S. , Sharma , D. , and Lacaita , A . 2007. Physical interpretation, modeling and impact on phase change memory (PCM) reliability of resistance drift due to chalcogenide structural relaxation . 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L. , Chandrasekhar , U. , Bains , R. , Viajedor , V. , Mak , W. , Choi , M. , Udeshi , D. , Luo , M. , Qureshi , S. , Tsai , J. , Jaffin , F. , Liu , Y. , and Mancinelli , M . 2008. A 50nm 8Gb NAND flash memory with 100MB\/s program throughput and 200MB\/s DDR interface . In Proceedings of the IEEE International Solid-State Circuits Conference (ISSCC'08) . 426--625. Nobunaga, D., Abedifard, E., Roohparvar, F., Lee, J., Yu, E., Vahidimowlavi, A., Abraham, M., Talreja, S., Sundaram, R., Rozman, R., Vu, L., Chen, C. L., Chandrasekhar, U., Bains, R., Viajedor, V., Mak, W., Choi, M., Udeshi, D., Luo, M., Qureshi, S., Tsai, J., Jaffin, F., Liu, Y., and Mancinelli, M. 2008. A 50nm 8Gb NAND flash memory with 100MB\/s program throughput and 200MB\/s DDR interface. In Proceedings of the IEEE International Solid-State Circuits Conference (ISSCC'08). 426--625."},{"key":"e_1_2_1_34_1","unstructured":"Numonyx. 2008. The basics of phase change memory (PCM) technology. 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