{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,8,18]],"date-time":"2026-08-18T01:40:42Z","timestamp":1787017242542,"version":"build-2736575974"},"publisher-location":"New York, NY, USA","reference-count":31,"publisher":"ACM","license":[{"start":{"date-parts":[[2013,6,23]],"date-time":"2013-06-23T00:00:00Z","timestamp":1371945600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"name":"NetApp Faculty Fellowship"},{"DOI":"10.13039\/100002418","name":"Intel Corporation","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100002418","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2013,6,23]]},"DOI":"10.1145\/2485922.2485929","type":"proceedings-article","created":{"date-parts":[[2013,6,25]],"date-time":"2013-06-25T15:13:21Z","timestamp":1372173201000},"page":"72-83","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":119,"title":["ArchShield"],"prefix":"10.1145","author":[{"given":"Prashant J.","family":"Nair","sequence":"first","affiliation":[{"name":"Georgia Institute of Technology"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Dae-Hyun","family":"Kim","sequence":"additional","affiliation":[{"name":"Georgia Institute of Technology"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Moinuddin K.","family":"Qureshi","sequence":"additional","affiliation":[{"name":"Georgia Institute of Technology"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2013,6,23]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555760"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555758"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555759"},{"key":"e_1_3_2_1_4_1","unstructured":"A. Allan. (2007 dec.) International technology roadmap for semiconductors (japan ortc). {Online}. Available: http:\/\/www.itrs.net\/Links\/2007Winter\/2007_Winter_Presentations\/  A. Allan. (2007 dec.) International technology roadmap for semiconductors (japan ortc). {Online}. Available: http:\/\/www.itrs.net\/Links\/2007Winter\/2007_Winter_Presentations\/"},{"key":"e_1_3_2_1_5_1","first-page":"12.4.1","volume-title":"dec","author":"Hong S.","year":"2010","unstructured":"S. Hong , \" Memory technology trend and future challenges,\" in Electron Devices Meeting (IEDM), 2010 IEEE International , dec . 2010 , pp. 12.4.1 -- 12.4.4 . S. Hong, \"Memory technology trend and future challenges,\" in Electron Devices Meeting (IEDM), 2010 IEEE International, dec. 2010, pp. 12.4.1--12.4.4."},{"key":"e_1_3_2_1_6_1","first-page":"5","volume-title":"Systems and Applications, 2008. VLSI-TSA 2008. International Symposium on, april","author":"Kim K.","year":"2008","unstructured":"K. Kim , \" Future memory technology : challenges and opportunities,\" in VLSI Technology , Systems and Applications, 2008. VLSI-TSA 2008. International Symposium on, april 2008 , pp. 5 -- 9 . K. Kim, \"Future memory technology: challenges and opportunities,\" in VLSI Technology, Systems and Applications, 2008. VLSI-TSA 2008. International Symposium on, april 2008, pp. 5--9."},{"key":"e_1_3_2_1_7_1","volume-title":"Disk. Morgan Kaufmann","author":"Jacob B. L.","year":"2008","unstructured":"B. L. Jacob , S. W. Ng , and D. T. Wang , Memory Systems: Cache, DRAM , Disk. Morgan Kaufmann , 2008 . B. L. Jacob, S. W. Ng, and D. T. Wang, Memory Systems: Cache, DRAM, Disk. Morgan Kaufmann, 2008."},{"key":"e_1_3_2_1_8_1","volume-title":"Semicon China","author":"Gu B.","year":"2003","unstructured":"B. Gu , T. Coughlin , B. Maxwell , J. Griffith , J. Lee , J. Cordingley , S. Johnson , E. Karaginiannis , and J. Ehmann , \" Challenges and future directions of laser fuse processing in memory repair,\" in Proc . Semicon China , 2003 . B. Gu, T. Coughlin, B. Maxwell, J. Griffith, J. Lee, J. Cordingley, S. Johnson, E. Karaginiannis, and J. Ehmann, \"Challenges and future directions of laser fuse processing in memory repair,\" in Proc. Semicon China, 2003."},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.2307\/2315408"},{"key":"e_1_3_2_1_10_1","volume-title":"Micron","year":"2011","unstructured":"TN-29-59 : Bad Block Management in NAND Flash Memory , Micron , 2011 . TN-29-59: Bad Block Management in NAND Flash Memory, Micron, 2011."},{"key":"e_1_3_2_1_11_1","volume-title":"Retention-aware placement in dram (rapid):software methods for quasi-non-volatile dram,\" in HPCA-12","author":"Venkatesan R.","year":"2006","unstructured":"R. Venkatesan , S. Herr , and E. Rotenberg , \" Retention-aware placement in dram (rapid):software methods for quasi-non-volatile dram,\" in HPCA-12 , 2006 . R. Venkatesan, S. Herr, and E. Rotenberg, \"Retention-aware placement in dram (rapid):software methods for quasi-non-volatile dram,\" in HPCA-12, 2006."},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/2366231.2337161"},{"key":"e_1_3_2_1_13_1","volume-title":"Testing Semiconductor Memories: Theory and Practice","author":"van de Goor A. J.","unstructured":"A. J. van de Goor , Testing Semiconductor Memories: Theory and Practice . John Wiley & Sons, Inc. A. J. van de Goor, Testing Semiconductor Memories: Theory and Practice. John Wiley & Sons, Inc."},{"key":"e_1_3_2_1_14_1","volume-title":"Testing of Digital Systems","author":"Jha N. K.","unstructured":"N. K. Jha and S. Gupta , Testing of Digital Systems . Cambridge Univ. Press . N. K. Jha and S. Gupta, Testing of Digital Systems. Cambridge Univ. Press."},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/885651.781076"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2010.22"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2009.2023248"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2007.38"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/1736020.1736064"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/1736020.1736023"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1145\/1815961.1815980"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2010.46"},{"key":"e_1_3_2_1_23_1","unstructured":"M. K. Qureshi \"Pay-As-You-Go: Low Overhead Hard-Error Correction for Phase Change Memories \" in MICRO-44.  M. K. Qureshi \"Pay-As-You-Go: Low Overhead Hard-Error Correction for Phase Change Memories \" in MICRO-44 ."},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"crossref","unstructured":"D. H. Yoon N. Muralimanohar J. Chang P. Ranganathan N. Jouppi and M. Erez \"FREE-p: Protecting non-volatile memory against both hard and soft errors \" in HPCA-2011.   D. H. Yoon N. Muralimanohar J. Chang P. Ranganathan N. Jouppi and M. Erez \"FREE-p: Protecting non-volatile memory against both hard and soft errors \" in HPCA-2011 .","DOI":"10.1109\/HPCA.2011.5749752"},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.5555\/1302494.1302862"},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2008.22"},{"key":"e_1_3_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669127"},{"key":"e_1_3_2_1_28_1","volume-title":"Archipelago: A polymorphic cache design for enabling robust near-threshold operation,\" in HPCA-2011, feb","author":"Ansari A.","year":"2011","unstructured":"A. Ansari , S. Feng , S. Gupta , and S. Mahlke , \" Archipelago: A polymorphic cache design for enabling robust near-threshold operation,\" in HPCA-2011, feb . 2011 . A. Ansari, S. Feng, S. Gupta, and S. Mahlke, \"Archipelago: A polymorphic cache design for enabling robust near-threshold operation,\" in HPCA-2011, feb. 2011."},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1145\/2000064.2000118"},{"key":"e_1_3_2_1_30_1","volume-title":"Impact of error correction code and dynamic memory reconfiguration on high-reliability\/low-cost server memory,\" in Integrated Reliability Workshop, 16 2006-sept. 19","author":"Slayman C.","year":"2006","unstructured":"C. Slayman , M. Ma , and S. Lindley , \" Impact of error correction code and dynamic memory reconfiguration on high-reliability\/low-cost server memory,\" in Integrated Reliability Workshop, 16 2006-sept. 19 2006 . C. Slayman, M. Ma, and S. Lindley, \"Impact of error correction code and dynamic memory reconfiguration on high-reliability\/low-cost server memory,\" in Integrated Reliability Workshop, 16 2006-sept. 19 2006."},{"key":"e_1_3_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1145\/2189750.2150989"}],"event":{"name":"ISCA'13: The 40th Annual International Symposium on Computer Architecture","location":"Tel-Aviv Israel","acronym":"ISCA'13","sponsor":["IEEE CS","SIGARCH ACM Special Interest Group on Computer Architecture"]},"container-title":["Proceedings of the 40th Annual International Symposium on Computer Architecture"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2485922.2485929","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2485922.2485929","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T04:48:43Z","timestamp":1750222123000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2485922.2485929"}},"subtitle":["architectural framework for assisting DRAM scaling by tolerating high error rates"],"short-title":[],"issued":{"date-parts":[[2013,6,23]]},"references-count":31,"alternative-id":["10.1145\/2485922.2485929","10.1145\/2485922"],"URL":"https:\/\/doi.org\/10.1145\/2485922.2485929","relation":{"is-identical-to":[{"id-type":"doi","id":"10.1145\/2508148.2485929","asserted-by":"object"}]},"subject":[],"published":{"date-parts":[[2013,6,23]]},"assertion":[{"value":"2013-06-23","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}