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Des. Autom. Electron. Syst."],"published-print":{"date-parts":[[2013,10]]},"abstract":"<jats:p>Current heterogeneous chip-multiprocessors (CMPs) integrate a GPU architecture on a die. However, the heterogeneity of this architecture inevitably exerts different pressures on shared resource management due to differing characteristics of CPU and GPU cores. We consider how to efficiently share on-chip resources between cores within the heterogeneous system, in particular the on-chip network. Heterogeneous architectures use an on-chip interconnection network to access shared resources such as last-level cache tiles and memory controllers, and this type of on-chip network will have a significant impact on performance.<\/jats:p>\n          <jats:p>In this article, we propose a feedback-directed virtual channel partitioning (VCP) mechanism for on-chip routers to effectively share network bandwidth between CPU and GPU cores in a heterogeneous architecture. VCP dedicates a few virtual channels to CPU and GPU applications with separate injection queues. The proposed mechanism balances on-chip network bandwidth for applications running on CPU and GPU cores by adaptively choosing the best partitioning configuration. As a result, our mechanism improves system throughput by 15% over the baseline across 39 heterogeneous workloads.<\/jats:p>","DOI":"10.1145\/2504906","type":"journal-article","created":{"date-parts":[[2013,11,6]],"date-time":"2013-11-06T14:09:19Z","timestamp":1383746959000},"page":"1-28","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":29,"title":["Adaptive virtual channel partitioning for network-on-chip in heterogeneous architectures"],"prefix":"10.1145","volume":"18","author":[{"given":"Jaekyu","family":"Lee","sequence":"first","affiliation":[{"name":"Georgia Institute of Technology"}]},{"given":"Si","family":"Li","sequence":"additional","affiliation":[{"name":"Georgia Institute of Technology"}]},{"given":"Hyesoon","family":"Kim","sequence":"additional","affiliation":[{"name":"Georgia Institute of Technology"}]},{"given":"Sudhakar","family":"Yalamanchili","sequence":"additional","affiliation":[{"name":"Georgia Institute of Technology"}]}],"member":"320","published-online":{"date-parts":[[2013,10,25]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555810"},{"key":"e_1_2_1_2_1","unstructured":"AMD. 2011. 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