{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,10]],"date-time":"2026-01-10T00:42:50Z","timestamp":1768005770177,"version":"3.49.0"},"reference-count":27,"publisher":"Association for Computing Machinery (ACM)","issue":"4","license":[{"start":{"date-parts":[[2013,10,1]],"date-time":"2013-10-01T00:00:00Z","timestamp":1380585600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Des. Autom. Electron. Syst."],"published-print":{"date-parts":[[2013,10]]},"abstract":"<jats:p>Scan chains insertion is the most common technique to ensure the testability of digital cores, providing high fault coverage. However, for ICs dealing with secret information, scan chains can be used as back doors for accessing secret data thus becoming a threat to system security. So far, advanced test structures used to reduce test costs (e.g., response compaction) and achieve high fault coverage (e.g., X's masking decoder) have been considered as intrinsic countermeasures against these threats. This work proposes a new generic scan-based attack demonstrating that these test structures are not sufficiently effective to prevent leakage through the test infrastructure. This generic attack can be easily adapted to several cryptographic implementations for both symmetric and public key algorithms. The proposed attack is demonstrated on several ciphers.<\/jats:p>","DOI":"10.1145\/2505014","type":"journal-article","created":{"date-parts":[[2013,11,6]],"date-time":"2013-11-06T14:09:19Z","timestamp":1383746959000},"page":"1-22","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":49,"title":["A novel differential scan attack on advanced DFT structures"],"prefix":"10.1145","volume":"18","author":[{"given":"Jean Da","family":"Rolt","sequence":"first","affiliation":[{"name":"Laboratoire de Robotique, Informatique et Microelectronique de Montpellier"}]},{"given":"Giorgio Di","family":"Natale","sequence":"additional","affiliation":[{"name":"Laboratoire de Robotique, Informatique et Microelectronique de Montpellier"}]},{"given":"Marie-Lise","family":"Flottes","sequence":"additional","affiliation":[{"name":"Laboratoire de Robotique, Informatique et Microelectronique de Montpellier"}]},{"given":"Bruno","family":"Rouzeyre","sequence":"additional","affiliation":[{"name":"Laboratoire de Robotique, Informatique et Microelectronique de Montpellier"}]}],"member":"320","published-online":{"date-parts":[[2013,10,25]]},"reference":[{"key":"e_1_2_1_1_1","volume-title":"Proceedings of the 1st Open NESSIE Workshop. http:\/\/www.larc.usp.br\/&sim;pbarreto\/KhazadPage.html.","author":"Barreto P.","unstructured":"Barreto , P. and Rijmen , V . 2000. The Khazad legacy-level block cipher . In Proceedings of the 1st Open NESSIE Workshop. http:\/\/www.larc.usp.br\/&sim;pbarreto\/KhazadPage.html. Barreto, P. and Rijmen, V. 2000. The Khazad legacy-level block cipher. In Proceedings of the 1st Open NESSIE Workshop. http:\/\/www.larc.usp.br\/&sim;pbarreto\/KhazadPage.html."},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1007\/s13389-012-0045-z"},{"key":"e_1_2_1_3_1","volume-title":"Proceedings of International Symposium on Hardware-Oriented Security and Trust (HOST'11)","author":"Da Rolt J.","unstructured":"Da Rolt , J. , Di Natale , G. , Flottes , M-L. , and Rouzeyre , B . 2011. New security threats against chips containing scan chain structures . In Proceedings of International Symposium on Hardware-Oriented Security and Trust (HOST'11) . 110--115. Da Rolt, J., Di Natale, G., Flottes, M-L., and Rouzeyre, B. 2011. New security threats against chips containing scan chain structures. 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