{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:51:51Z","timestamp":1750308711691,"version":"3.41.0"},"reference-count":4,"publisher":"Association for Computing Machinery (ACM)","issue":"2","license":[{"start":{"date-parts":[[2013,7,1]],"date-time":"2013-07-01T00:00:00Z","timestamp":1372636800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/501100004608","name":"National Natural Science Foundation of Jiangsu Province","doi-asserted-by":"publisher","award":["SBK201240198"],"award-info":[{"award-number":["SBK201240198"]}],"id":[{"id":"10.13039\/501100004608","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["61272131, 61202053"],"award-info":[{"award-number":["61272131, 61202053"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["SIGBED Rev."],"published-print":{"date-parts":[[2013,7]]},"abstract":"<jats:p>In this paper, we introduce middleware architecture to support hybrid thread level parallelism on heterogeneous multicore architectures, called Heterothread. Heterothread constructs a hierarchical level model for user programming and parallel task execution dataflow. Heterothread can provide unified programming interfaces which allow applications remain the same when the physical hardware (CPU, GPU, DSP and FPGA) is reconfigured or migrated. Consequently it can meet the real-time demands more efficiently than most state-of-the-art operating systems. A prototype has been built on FPGA to demonstrate Heterothread can achieve significant speedups against Linux kernels.<\/jats:p>","DOI":"10.1145\/2518148.2518152","type":"journal-article","created":{"date-parts":[[2013,9,3]],"date-time":"2013-09-03T11:57:11Z","timestamp":1378209431000},"page":"14-14","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":0,"title":["Heterothread"],"prefix":"10.1145","volume":"10","author":[{"given":"Chao","family":"Wang","sequence":"first","affiliation":[{"name":"Univ. of Sci. &amp; Tech. of China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Xi","family":"Li","sequence":"additional","affiliation":[{"name":"Univ. of Sci. &amp; Tech. of China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Xuehai","family":"Zhou","sequence":"additional","affiliation":[{"name":"Univ. of Sci. &amp; Tech. of China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2013,7]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/1978542.1978558"},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/1531793.1531805"},{"volume-title":"Proceedings of the 13th USENIX conference on Hot topics in operating systems.2011","author":"Mogul J. C.","key":"e_1_2_1_3_1","unstructured":"J. C. Mogul , A. Baumann , T. Roscoe , L. Soares . Mind the gap: reconnecting architecture and OS research . in Proceedings of the 13th USENIX conference on Hot topics in operating systems.2011 . J. C. Mogul, A. Baumann, T. Roscoe, L. Soares. Mind the gap: reconnecting architecture and OS research. in Proceedings of the 13th USENIX conference on Hot topics in operating systems.2011."},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/2155620.2155628"}],"container-title":["ACM SIGBED Review"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2518148.2518152","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2518148.2518152","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T20:14:13Z","timestamp":1750277653000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2518148.2518152"}},"subtitle":["hybrid thread level parallelism on heterogeneous multicore architectures"],"short-title":[],"issued":{"date-parts":[[2013,7]]},"references-count":4,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2013,7]]}},"alternative-id":["10.1145\/2518148.2518152"],"URL":"https:\/\/doi.org\/10.1145\/2518148.2518152","relation":{},"ISSN":["1551-3688"],"issn-type":[{"type":"electronic","value":"1551-3688"}],"subject":[],"published":{"date-parts":[[2013,7]]},"assertion":[{"value":"2013-07-01","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}