{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:20:38Z","timestamp":1750306838964,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":12,"publisher":"ACM","license":[{"start":{"date-parts":[[2013,8,22]],"date-time":"2013-08-22T00:00:00Z","timestamp":1377129600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2013,8,22]]},"DOI":"10.1145\/2522548.2523137","type":"proceedings-article","created":{"date-parts":[[2013,10,29]],"date-time":"2013-10-29T14:11:56Z","timestamp":1383055916000},"page":"1-6","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":0,"title":["Fine grain thread scheduling on multicore processors"],"prefix":"10.1145","author":[{"given":"Munish","family":"Bhatia","sequence":"first","affiliation":[{"name":"Birla Institute of Technology and Science Pilani, Pilani, India"}]},{"given":"D. C.","family":"Kiran","sequence":"additional","affiliation":[{"name":"Birla Institute of Technology and Science Pilani, Pilani, India"}]},{"given":"J. P.","family":"Misra","sequence":"additional","affiliation":[{"name":"Birla Institute of Technology and Science Pilani, Pilani, India"}]},{"given":"S.","family":"Gurunarayanan","sequence":"additional","affiliation":[{"name":"Birla Institute of Technology and Science Pilani, Pilani, India"}]}],"member":"320","published-online":{"date-parts":[[2013,8,22]]},"reference":[{"key":"e_1_3_2_1_1_1","volume-title":"Computer Architecture: A Quantitative Approach","author":"John","year":"2011","unstructured":"John L, Hennessy , David A Patterson , Computer Architecture: A Quantitative Approach , Morgan Kaufmann , San Francisco ( 2011 ). John L, Hennessy, David A Patterson, Computer Architecture: A Quantitative Approach, Morgan Kaufmann, San Francisco (2011)."},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2008.209"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2008.494"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/PACC.2011.5978868"},{"key":"e_1_3_2_1_5_1","volume-title":"6th International Conference on Information Processing, published in the Communications in Computer and Information Science (CCIS)","author":"Kiran D. C.","year":"2012","unstructured":"D. C. Kiran , S. Gurunarayanan , and J. P. Misra , Compiler Driven Inter Block Parallelism for Multicore Processors . In 6th International Conference on Information Processing, published in the Communications in Computer and Information Science (CCIS) , Springer-Verlag , August 2012 . D. C. Kiran, S. Gurunarayanan, and J. P. Misra, Compiler Driven Inter Block Parallelism for Multicore Processors. In 6th International Conference on Information Processing, published in the Communications in Computer and Information Science (CCIS), Springer-Verlag, August 2012."},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/115372.115320"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/PACC.2011.5978903"},{"key":"e_1_3_2_1_8_1","first-page":"9","volume-title":"The International Eco-friendly Computing and Communication Systems, published in the Communications in Computer and Information Science (CCIS)","author":"Kiran D. C.","year":"2012","unstructured":"D. C. Kiran , S. Gurunarayanan , Faizan Khaliq , and Abhijeet Nawal , Compiler Efficient and Power Aware Instruction Level Parallelism for Multicore Architectures . In The International Eco-friendly Computing and Communication Systems, published in the Communications in Computer and Information Science (CCIS) , Springer-Verlag , pp. 9 -- 17 August 2012 . D. C. Kiran, S. Gurunarayanan, Faizan Khaliq, and Abhijeet Nawal, Compiler Efficient and Power Aware Instruction Level Parallelism for Multicore Architectures. In The International Eco-friendly Computing and Communication Systems, published in the Communications in Computer and Information Science (CCIS), Springer-Verlag, pp.9--17 August 2012."},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/MC.1984.1659185"},{"key":"e_1_3_2_1_10_1","first-page":"134","volume-title":"Proceedings of the 5th IEEE Symposium on FPGA-Based Custom Computing Machines","author":"Babb J.","year":"1997","unstructured":"J. Babb , M. Frank , V. Lee , E. Waingold , R. Barua , M. Taylor J. Kim , S. Devabhaktuni , A. Agarwal, The RAW benchmark suite: computation structures for general purpose computing , Proceedings of the 5th IEEE Symposium on FPGA-Based Custom Computing Machines , pp. 134 , 1997 . J. Babb, M. Frank, V. Lee, E. Waingold, R. Barua, M. Taylor J. Kim, S. Devabhaktuni, A. Agarwal, The RAW benchmark suite: computation structures for general purpose computing, Proceedings of the 5th IEEE Symposium on FPGA-Based Custom Computing Machines, pp.134, 1997."},{"key":"e_1_3_2_1_11_1","unstructured":"The Raw Benchmark Suit http:\/\/groups.csail.mit.edu\/cag\/raw\/benchmark\/  The Raw Benchmark Suit http:\/\/groups.csail.mit.edu\/cag\/raw\/benchmark\/"},{"key":"e_1_3_2_1_12_1","unstructured":"The JackCC Compiler http:\/\/jackcc.sourceforge.net  The JackCC Compiler http:\/\/jackcc.sourceforge.net"}],"event":{"name":"Compute '13: The 6th ACM India Computing Convention","sponsor":["SIGACT ACM Special Interest Group on Algorithms and Computation Theory"],"location":"Vellore Tamil Nadu India","acronym":"Compute '13"},"container-title":["Proceedings of the 6th ACM India Computing Convention"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2522548.2523137","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2522548.2523137","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T08:10:00Z","timestamp":1750234200000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2522548.2523137"}},"subtitle":["cores with multiple functional units"],"short-title":[],"issued":{"date-parts":[[2013,8,22]]},"references-count":12,"alternative-id":["10.1145\/2522548.2523137","10.1145\/2522548"],"URL":"https:\/\/doi.org\/10.1145\/2522548.2523137","relation":{},"subject":[],"published":{"date-parts":[[2013,8,22]]},"assertion":[{"value":"2013-08-22","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}