{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,24]],"date-time":"2025-10-24T16:38:35Z","timestamp":1761323915067,"version":"3.41.0"},"reference-count":44,"publisher":"Association for Computing Machinery (ACM)","issue":"3","license":[{"start":{"date-parts":[[2013,10,1]],"date-time":"2013-10-01T00:00:00Z","timestamp":1380585600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/501100004963","name":"Seventh Framework Programme","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100004963","id-type":"DOI","asserted-by":"publisher"}]},{"name":"NL STW 10346 NEST"},{"name":"Catrene CA104 Cobra"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["SIGBED Rev."],"published-print":{"date-parts":[[2013,10]]},"abstract":"<jats:p>Systems on chip (SOC) contain multiple concurrent applications with different time criticality (firm, soft, non real-time). As a result, they are often developed by different teams or companies, with different models of computation (MOC) such as dataflow, Kahn process networks (KPN), or time-triggered (TT). SOC functionality and (real-time) performance is verified after all applications have been integrated.<\/jats:p>\n          <jats:p>\n            In this paper we propose the CompSOC platform and design flows that offers\n            <jats:italic>a virtual execution platform per application, to allow independent design, verification, and execution<\/jats:italic>\n            . We introduce the composability and predictability concepts, why they help, and how they are implemented in the different resources of the CompSOC architecture. We define a design flow that allows real-time cyclo-static dataflow (CSDF) applications to be automatically mapped, verified, and executed. Mapping and analysis of KPN and TT applications is not automated but they do run composably in their allocated virtual platforms.\n          <\/jats:p>\n          <jats:p>Although most of the techniques used here have been published in isolation, this paper is the first comprehensive overview of the CompSOC approach. Moreover, three new case studies illustrate all claimed benefits: 1) An example firm-real-time CSDF H.263 decoder is automatically mapped and verified. 2) Applications with different models of computation (CSDF and TT) run composably. 3) Adaptive soft-real-time applications execute composably and can hence be verified independently by simulation.<\/jats:p>","DOI":"10.1145\/2544350.2544353","type":"journal-article","created":{"date-parts":[[2013,11,26]],"date-time":"2013-11-26T13:23:15Z","timestamp":1385472195000},"page":"23-34","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":64,"title":["Virtual execution platforms for mixed-time-criticality systems"],"prefix":"10.1145","volume":"10","author":[{"given":"Kees","family":"Goossens","sequence":"first","affiliation":[{"name":"Eindhoven University of Technology"}]},{"given":"Arnaldo","family":"Azevedo","sequence":"additional","affiliation":[{"name":"Delft University of Technology"}]},{"given":"Karthik","family":"Chandrasekar","sequence":"additional","affiliation":[{"name":"Delft University of Technology"}]},{"given":"Manil Dev","family":"Gomony","sequence":"additional","affiliation":[{"name":"Eindhoven University of Technology"}]},{"given":"Sven","family":"Goossens","sequence":"additional","affiliation":[{"name":"Eindhoven University of Technology"}]},{"given":"Martijn","family":"Koedam","sequence":"additional","affiliation":[{"name":"Eindhoven University of Technology"}]},{"given":"Yonghui","family":"Li","sequence":"additional","affiliation":[{"name":"Eindhoven University of Technology"}]},{"given":"Davit","family":"Mirzoyan","sequence":"additional","affiliation":[{"name":"Delft University of Technology"}]},{"given":"Anca","family":"Molnos","sequence":"additional","affiliation":[{"name":"Delft University of Technology"}]},{"given":"Ashkan Beyranvand","family":"Nejad","sequence":"additional","affiliation":[{"name":"Delft University of Technology"}]},{"given":"Andrew","family":"Nelson","sequence":"additional","affiliation":[{"name":"Delft University of Technology"}]},{"given":"Shubhendu","family":"Sinha","sequence":"additional","affiliation":[{"name":"Eindhoven University of Technology"}]}],"member":"320","published-online":{"date-parts":[[2013,10]]},"reference":[{"doi-asserted-by":"publisher","key":"e_1_2_1_1_1","DOI":"10.5555\/827270.829047"},{"doi-asserted-by":"publisher","key":"e_1_2_1_2_1","DOI":"10.1109\/TII.2009.2013633"},{"doi-asserted-by":"publisher","key":"e_1_2_1_3_1","DOI":"10.1145\/1289816.1289877"},{"doi-asserted-by":"publisher","key":"e_1_2_1_4_1","DOI":"10.1109\/DSD.2009.167"},{"doi-asserted-by":"publisher","key":"e_1_2_1_5_1","DOI":"10.1109\/RTCSA.2011.33"},{"key":"e_1_2_1_6_1","first-page":"25","volume-title":"Multiprocessor System-on-Chip --- Hardware Design and Tool Integration, Circuits and Systems","author":"Akesson B.","year":"2010","unstructured":"B. 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