{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,9]],"date-time":"2026-06-09T09:19:38Z","timestamp":1780996778786,"version":"3.54.1"},"reference-count":21,"publisher":"Association for Computing Machinery (ACM)","issue":"2s","license":[{"start":{"date-parts":[[2014,1,1]],"date-time":"2014-01-01T00:00:00Z","timestamp":1388534400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"name":"Global Unichip Corp."},{"DOI":"10.13039\/501100001868","name":"National Science Council Taiwan","doi-asserted-by":"publisher","award":["98-2221-E-009-157-MY3"],"award-info":[{"award-number":["98-2221-E-009-157-MY3"]}],"id":[{"id":"10.13039\/501100001868","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Embed. Comput. Syst."],"published-print":{"date-parts":[[2014,1]]},"abstract":"<jats:p>\n            Solid-state disks use multichannel architectures to boost their data transfer rates. Because realistic disk workloads have numerous small write requests, modern flash-storage devices adopt a write buffer and a set of independent channels for better parallelism in serving small write requests. When a channel is undergoing garbage collection, it stops responding to inbound write traffic and accumulates page data in the write buffer. This results in contention for buffer space and creates idle periods in channels. This study presents a channel-management strategy, called\n            <jats:italic>garbage-collection advancing<\/jats:italic>\n            , which allows early start of garbage collection in channels for increasing the overlap among channel activities of garbage collection and restoring the balance of buffer-space usage among channels. This study further introduces\n            <jats:italic>cycle filling<\/jats:italic>\n            , which is a version of garbage-collection advancing tailored for the operation model of flash planes. Experimental results show that the proposed methods greatly outperformed existing designs of multichannel systems in terms of response and throughput. We also successfully implemented the proposed methods in a real solid-state disk and proved their feasibility in real hardware.\n          <\/jats:p>","DOI":"10.1145\/2544375.2544383","type":"journal-article","created":{"date-parts":[[2014,2,4]],"date-time":"2014-02-04T14:16:21Z","timestamp":1391523381000},"page":"1-23","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":11,"title":["Reducing asynchrony in channel garbage-collection for improving internal parallelism of multichannel solid-state disks"],"prefix":"10.1145","volume":"13","author":[{"given":"Li-Pin","family":"Chang","sequence":"first","affiliation":[{"name":"National Chiao-Tung University"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Chen-Yi","family":"Wen","sequence":"additional","affiliation":[{"name":"National Chiao-Tung University"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2014,1,27]]},"reference":[{"key":"e_1_2_1_1_1","volume-title":"Proceedings of the USENIX Annual Technical Conference on Annual Technical Conference (ATC'08)","author":"Agrawal N.","unstructured":"N. Agrawal , V. Prabhakaran , T. Wobber , J. D. Davis , M. Manasse , and R. Panigrahy . 2008. Design tradeoffs for SSD performance . In Proceedings of the USENIX Annual Technical Conference on Annual Technical Conference (ATC'08) . USENIX Association, 57--70. N. Agrawal, V. Prabhakaran, T. Wobber, J. D. Davis, M. Manasse, and R. Panigrahy. 2008. Design tradeoffs for SSD performance. In Proceedings of the USENIX Annual Technical Conference on Annual Technical Conference (ATC'08). USENIX Association, 57--70."},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/2024724.2024731"},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2010.14"},{"key":"e_1_2_1_4_1","volume-title":"Proceedings of the 8th IEEE Real-Time and Embedded Technology and Applications Symposium. 187--196","author":"Chang L.-P.","year":"2002","unstructured":"L.-P. Chang , and T.-W. Kuo . 2002 . An adaptive striping architecture for flash memory storage systems of embedded systems . In Proceedings of the 8th IEEE Real-Time and Embedded Technology and Applications Symposium. 187--196 . L.-P. Chang, and T.-W. Kuo. 2002. An adaptive striping architecture for flash memory storage systems of embedded systems. In Proceedings of the 8th IEEE Real-Time and Embedded Technology and Applications Symposium. 187--196."},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/1027794.1027801"},{"key":"e_1_2_1_6_1","volume-title":"Proceedings of the Conference on Design, Automation and Test in Europe (DATE'09)","author":"Cho H.","unstructured":"H. Cho , D. Shin , and Y. I. Eom . 2009. Kast: K-associative sector translation for NAND flash memory in real-time systems . In Proceedings of the Conference on Design, Automation and Test in Europe (DATE'09) . European Design and Automation Association, 507--512. H. Cho, D. Shin, and Y. I. Eom. 2009. Kast: K-associative sector translation for NAND flash memory in real-time systems. In Proceedings of the Conference on Design, Automation and Test in Europe (DATE'09). European Design and Automation Association, 507--512."},{"key":"e_1_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555790"},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/1508244.1508271"},{"key":"e_1_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.sysarc.2007.01.010"},{"key":"e_1_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2008.224"},{"key":"e_1_2_1_11_1","volume-title":"Proceedings of the 6th USENIX Conference on File and Storage Technologies (FAST'08)","author":"Kim H.","unstructured":"H. Kim and S. Ahn . 2008. BPLRU: A buffer management scheme for improving random writes in flash storage . In Proceedings of the 6th USENIX Conference on File and Storage Technologies (FAST'08) . USENIX Association, 1--14. H. Kim and S. Ahn. 2008. BPLRU: A buffer management scheme for improving random writes in flash storage. In Proceedings of the 6th USENIX Conference on File and Storage Technologies (FAST'08). USENIX Association, 1--14."},{"key":"e_1_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/1275986.1275990"},{"key":"e_1_2_1_13_1","volume-title":"MT29F512G08 NAND Flash Memory Data Sheet. Micron Technology","unstructured":"Micron Technology. 2009. MT29F512G08 NAND Flash Memory Data Sheet. Micron Technology , Inc . Micron Technology. 2009. MT29F512G08 NAND Flash Memory Data Sheet. Micron Technology, Inc."},{"key":"e_1_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2010.209"},{"key":"e_1_2_1_15_1","unstructured":"Open NAND Flash Interface. 2011. ONFi 3.0 Specification. Open NAND Flash Interface.  Open NAND Flash Interface. 2011. ONFi 3.0 Specification. Open NAND Flash Interface."},{"key":"e_1_2_1_16_1","unstructured":"Open Source Development Lab. 2003. Iometer. http:\/\/http:\/\/www.iometer.org\/.  Open Source Development Lab. 2003. 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