{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:19:57Z","timestamp":1750306797905,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":13,"publisher":"ACM","license":[{"start":{"date-parts":[[2014,1,22]],"date-time":"2014-01-22T00:00:00Z","timestamp":1390348800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/501100004963","name":"Seventh Framework Programme","doi-asserted-by":"publisher","award":["FP7-ICT-288574"],"award-info":[{"award-number":["FP7-ICT-288574"]}],"id":[{"id":"10.13039\/501100004963","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2014,1,22]]},"DOI":"10.1145\/2556857.2556859","type":"proceedings-article","created":{"date-parts":[[2014,1,14]],"date-time":"2014-01-14T13:40:06Z","timestamp":1389706806000},"page":"1-4","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":3,"title":["A feature-rich NoC switch with cross-feature optimizations for the next generation of reliable and reconfigurable embedded systems"],"prefix":"10.1145","author":[{"given":"Alessandro","family":"Strano","sequence":"first","affiliation":[{"name":"ENDIF, University of Ferrara, Ferrara, Italy"}]},{"given":"Alberto","family":"Ghiribaldi","sequence":"additional","affiliation":[{"name":"ENDIF, University of Ferrara, Ferrara, Italy"}]},{"given":"Herve Tatenguem","family":"Fankem","sequence":"additional","affiliation":[{"name":"ENDIF, University of Ferrara, Ferrara, Italy"}]},{"given":"Davide","family":"Bertozzi","sequence":"additional","affiliation":[{"name":"ENDIF, University of Ferrara, Ferrara, Italy"}]}],"member":"320","published-online":{"date-parts":[[2014,1,22]]},"reference":[{"key":"e_1_3_2_1_1_1","first-page":"559","volume-title":"DAC","author":"S. Stergiou","year":"2005"},{"volume-title":"SAMOS","year":"2012","author":"Strano A.","key":"e_1_3_2_1_2_1"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/NOCS.2010.12"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/2107763.2107769"},{"first-page":"350","volume-title":"Mar. 2003","author":"Trade A.","key":"e_1_3_2_1_5_1"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"crossref","unstructured":"Jose Flich Davide Bertozzi \"Designing Network On-Chip Architectures in the Nanoscale Era\" 2010 by Chapman and Hall\/CRC   Jose Flich Davide Bertozzi \"Designing Network On-Chip Architectures in the Nanoscale Era\" 2010 by Chapman and Hall\/CRC","DOI":"10.1201\/b10477"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/2522968.2522976"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/IGCC.2012.6322281"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2008.31"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"crossref","unstructured":"A. Ghiribaldi D. Ludovici M. Favalli D. Bertozzi. \"System-Level Infrastructure for Boot-time Testing and Configuration of Networks-on-Chip with Programmable Routing Logic.\" VLSI-SoC 2011.  A. Ghiribaldi D. Ludovici M. Favalli D. Bertozzi. \"System-Level Infrastructure for Boot-time Testing and Configuration of Networks-on-Chip with Programmable Routing Logic.\" VLSI-SoC 2011.","DOI":"10.1109\/VLSISoC.2011.6081597"},{"key":"e_1_3_2_1_11_1","unstructured":"Jared C. Smolens Brian T. Gold James C. Hoe Babak Falsafi and Ken Mai \"Detecting Emerging Wearout Faults\" SELSE 2007.  Jared C. Smolens Brian T. Gold James C. Hoe Babak Falsafi and Ken Mai \"Detecting Emerging Wearout Faults\" SELSE 2007."},{"volume-title":"DAC 2012","year":"2012","author":"Melpignano Diego","key":"e_1_3_2_1_12_1"},{"key":"e_1_3_2_1_13_1","unstructured":"Peter Mandl Udeepta Bordoloi \"General-purpose Graphics Processing Units Deliver New Capabilities to the Embedded Market\" http:\/\/www.amd.com\/tw\/Documents\/GPGPU-Embedded.pdf.  Peter Mandl Udeepta Bordoloi \"General-purpose Graphics Processing Units Deliver New Capabilities to the Embedded Market\" http:\/\/www.amd.com\/tw\/Documents\/GPGPU-Embedded.pdf."}],"event":{"name":"INA-OCMC '14: On-Chip, Multi-Chip 2014","sponsor":["HiPEAC HiPEAC Network of Excellence"],"location":"Vienna Austria","acronym":"INA-OCMC '14"},"container-title":["Proceedings of the 8th International Workshop on Interconnection Network Architecture: On-Chip, Multi-Chip"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2556857.2556859","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2556857.2556859","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T07:34:40Z","timestamp":1750232080000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2556857.2556859"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,1,22]]},"references-count":13,"alternative-id":["10.1145\/2556857.2556859","10.1145\/2556857"],"URL":"https:\/\/doi.org\/10.1145\/2556857.2556859","relation":{},"subject":[],"published":{"date-parts":[[2014,1,22]]},"assertion":[{"value":"2014-01-22","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}