{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,30]],"date-time":"2026-06-30T21:23:17Z","timestamp":1782854597701,"version":"3.54.5"},"publisher-location":"New York, NY, USA","reference-count":56,"publisher":"ACM","license":[{"start":{"date-parts":[[2014,6,16]],"date-time":"2014-06-16T00:00:00Z","timestamp":1402876800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/100000144","name":"Division of Computer and Network Systems","doi-asserted-by":"publisher","award":["CAREER Award CCF 0953246, CCF 1212962, CNS 1065112"],"award-info":[{"award-number":["CAREER Award CCF 0953246, CCF 1212962, CNS 1065112"]}],"id":[{"id":"10.13039\/100000144","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000143","name":"Division of Computing and Communication Foundations","doi-asserted-by":"publisher","award":["CAREER Award CCF 0953246, CCF 1212962, CNS 1065112"],"award-info":[{"award-number":["CAREER Award CCF 0953246, CCF 1212962, CNS 1065112"]}],"id":[{"id":"10.13039\/100000143","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2014,6,16]]},"DOI":"10.1145\/2591971.2592000","type":"proceedings-article","created":{"date-parts":[[2014,6,10]],"date-time":"2014-06-10T08:50:25Z","timestamp":1402390225000},"page":"519-532","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":75,"title":["The efficacy of error mitigation techniques for DRAM retention failures"],"prefix":"10.1145","author":[{"given":"Samira","family":"Khan","sequence":"first","affiliation":[{"name":"Carnegie Mellon University & Intel Labs, Pittsburgh, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Donghyuk","family":"Lee","sequence":"additional","affiliation":[{"name":"Carnegie Mellon University, Pittsburgh, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Yoongu","family":"Kim","sequence":"additional","affiliation":[{"name":"Carnegie Mellon University, Pittsburgh, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Alaa R.","family":"Alameldeen","sequence":"additional","affiliation":[{"name":"Intel Labs, Hillsboro, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Chris","family":"Wilkerson","sequence":"additional","affiliation":[{"name":"Intel Labs, Hillsboro, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Onur","family":"Mutlu","sequence":"additional","affiliation":[{"name":"Carnegie Mellon University, Pittsburgh, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2014,6,16]]},"reference":[{"key":"e_1_3_2_1_1_1","volume-title":"High performance memory testing: Design principles, fault modeling and self-test","author":"Adams R. D.","year":"2003","unstructured":"R. D. Adams . High performance memory testing: Design principles, fault modeling and self-test . Springer , 2003 . R. D. Adams. High performance memory testing: Design principles, fault modeling and self-test. Springer, 2003."},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/ASSCC.2006.357915"},{"key":"e_1_3_2_1_3_1","volume-title":"ITC","author":"Z.","year":"2006","unstructured":"Z. Al-Ars et al. DRAM-specific space of memory tests . ITC , 2006 . Z. Al-Ars et al. DRAM-specific space of memory tests. ITC, 2006."},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/2000064.2000118"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2002.1175845"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2014.6835946"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/1815961.1816026"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2008.93"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2012.48"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/5.915374"},{"key":"e_1_3_2_1_11_1","volume-title":"On the retention time distribution of Dynamic Random Access Memory (DRAM)","author":"Hamamoto T.","year":"1998","unstructured":"T. Hamamoto On the retention time distribution of Dynamic Random Access Memory (DRAM) . 1998 . T. Hamamoto et al. On the retention time distribution of Dynamic Random Access Memory (DRAM). 1998."},{"key":"e_1_3_2_1_12_1","volume-title":"Impact of CMOS technology scaling on the atmospheric neutron soft error rate. TNS, 47(6)","author":"Hazucha P.","year":"2000","unstructured":"P. Hazucha and C. Svensson . Impact of CMOS technology scaling on the atmospheric neutron soft error rate. TNS, 47(6) , 2000 . P. Hazucha and C. Svensson. Impact of CMOS technology scaling on the atmospheric neutron soft error rate. TNS, 47(6), 2000."},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.1998.746306"},{"key":"e_1_3_2_1_14_1","volume-title":"VLSI-DAT","author":"Hou C.-S.","year":"2013","unstructured":"C.-S. Hou An FPGA-based test platform for analyzing data retention time distribution of DRAMs . VLSI-DAT , 2013 . C.-S. Hou et al. An FPGA-based test platform for analyzing data retention time distribution of DRAMs. VLSI-DAT, 2013."},{"key":"e_1_3_2_1_15_1","volume-title":"July","author":"JEDEC.","year":"2012","unstructured":"JEDEC. Standard No. 79-3F. DDR3 SDRAM Specification , July 2012 . JEDEC. Standard No. 79-3F. DDR3 SDRAM Specification, July 2012."},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/2591971.2592000"},{"issue":"9","key":"e_1_3_2_1_17_1","volume":"58","author":"Kim H.","year":"2011","unstructured":"H. Kim IEEE Trans. Electron Dev. , 58 ( 9 ), 2011 . H. Kim et al. Characterization of the variable retention time in dynamic random access memory. IEEE Trans. Electron Dev., 58(9), 2011.","journal-title":"IEEE Trans. Electron Dev."},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2005.1609340"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2009.2024440"},{"key":"e_1_3_2_1_20_1","volume-title":"ISCA","author":"Kim Y.","year":"2012","unstructured":"Y. Kim A case for exploiting subarray-level parallelism (SALP) in DRAM . ISCA , 2012 . Y. Kim et al. A case for exploiting subarray-level parallelism (SALP) in DRAM. ISCA, 2012."},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/RELPHY.2004.1315442"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2013.6522354"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2009.2036138"},{"key":"e_1_3_2_1_24_1","volume-title":"ATC","author":"Li X.","year":"2010","unstructured":"X. Li A realistic evaluation of memory hardware errors and software system susceptibility . ATC , 2010 . X. Li et al. A realistic evaluation of memory hardware errors and software system susceptibility. ATC, 2010."},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2007.346196"},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2012.6378619"},{"key":"e_1_3_2_1_27_1","volume-title":"ISCA","author":"Liu J.","year":"2012","unstructured":"J. Liu : Retention-aware intelligent DRAM refresh . ISCA , 2012 . J. Liu et al. RAIDR: Retention-aware intelligent DRAM refresh. ISCA, 2012."},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1145\/2485922.2485928"},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1145\/1950365.1950391"},{"key":"e_1_3_2_1_30_1","volume-title":"DSN","author":"Luo Y.","year":"2014","unstructured":"Y. Luo . Characterizing application memory error vulnerability to optimize data center cost . DSN , 2014 . Y. Luo. Characterizing application memory error vulnerability to optimize data center cost. DSN, 2014."},{"key":"e_1_3_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1147\/rd.462.0187"},{"key":"e_1_3_2_1_32_1","author":"May T. C.","year":"1979","unstructured":"T. C. May Trans. Electron Dev. , 1979 . T. C. May et al. Alpha-particle-induced soft errors in dynamic memories. IEEE Trans. Electron Dev., 1979.","journal-title":"Trans. Electron Dev."},{"key":"e_1_3_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2005.1609541"},{"key":"e_1_3_2_1_34_1","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2005.1609344"},{"key":"e_1_3_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2005.37"},{"key":"e_1_3_2_1_36_1","volume-title":"IMW","author":"Mutlu O.","year":"2013","unstructured":"O. Mutlu . Memory scaling : A systems architecture perspective . IMW , 2013 . O. Mutlu. Memory scaling: A systems architecture perspective. IMW, 2013."},{"key":"e_1_3_2_1_37_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2013.6522355"},{"key":"e_1_3_2_1_38_1","doi-asserted-by":"publisher","DOI":"10.1145\/2485922.2485929"},{"key":"e_1_3_2_1_39_1","doi-asserted-by":"publisher","DOI":"10.1109\/VTEST.1991.208150"},{"key":"e_1_3_2_1_40_1","doi-asserted-by":"publisher","DOI":"10.1109\/16.278509"},{"key":"e_1_3_2_1_41_1","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.1992.307481"},{"key":"e_1_3_2_1_42_1","doi-asserted-by":"publisher","DOI":"10.1145\/1815961.1815980"},{"key":"e_1_3_2_1_43_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555349.1555372"},{"key":"e_1_3_2_1_44_1","volume-title":"IRPS","author":"Seo H. W.","year":"2002","unstructured":"H. W. Seo Charge trapping induced DRAM data retention time degradation under wafer-level burn-in stress . IRPS , 2002 . H. W. Seo et al. Charge trapping induced DRAM data retention time degradation under wafer-level burn-in stress. IRPS, 2002."},{"key":"e_1_3_2_1_45_1","doi-asserted-by":"publisher","DOI":"10.1145\/2503210.2503257"},{"key":"e_1_3_2_1_46_1","volume-title":"A study of DRAM failures in the field. SC","author":"Sridharan V.","year":"2012","unstructured":"V. Sridharan and D. Liberty . A study of DRAM failures in the field. SC , 2012 . V. Sridharan and D. Liberty. A study of DRAM failures in the field. SC, 2012."},{"key":"e_1_3_2_1_47_1","doi-asserted-by":"publisher","DOI":"10.1109\/RELPHY.1994.307864"},{"key":"e_1_3_2_1_48_1","doi-asserted-by":"publisher","DOI":"10.1145\/78949.78950"},{"key":"e_1_3_2_1_49_1","doi-asserted-by":"publisher","DOI":"10.5555\/839295.843667"},{"key":"e_1_3_2_1_50_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2006.1598122"},{"key":"e_1_3_2_1_51_1","volume-title":"ATS","author":"Wang M.-J.","year":"2001","unstructured":"M.-J. Wang Guardband determination for the detection of off-state and junction leakages in DRAM testing . ATS , 2001 . M.-J. Wang et al. Guardband determination for the detection of off-state and junction leakages in DRAM testing. ATS, 2001."},{"key":"e_1_3_2_1_52_1","doi-asserted-by":"publisher","DOI":"10.1145\/1815961.1815973"},{"key":"e_1_3_2_1_53_1","volume-title":"Oct.","year":"2012","unstructured":"Xilinx. ML605 Hardware User Guide , Oct. 2012 . Xilinx. ML605 Hardware User Guide, Oct. 2012."},{"key":"e_1_3_2_1_54_1","doi-asserted-by":"publisher","DOI":"10.1109\/16.830993"},{"key":"e_1_3_2_1_55_1","volume-title":"IEDM","author":"Yaney D.","year":"1987","unstructured":"D. Yaney A meta-stable leakage phenomenon in DRAM charge storage - Variable hold time . IEDM , 1987 . D. Yaney et al. A meta-stable leakage phenomenon in DRAM charge storage - Variable hold time. IEDM, 1987."},{"key":"e_1_3_2_1_56_1","doi-asserted-by":"publisher","DOI":"10.1145\/1736020.1736064"}],"event":{"name":"SIGMETRICS '14: ACM SIGMETRICS \/ International Conference on Measurement and Modeling of Computer Systems","location":"Austin Texas USA","acronym":"SIGMETRICS '14","sponsor":["SIGMETRICS ACM Special Interest Group on Measurement and Evaluation"]},"container-title":["The 2014 ACM international conference on Measurement and modeling of computer systems"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2591971.2592000","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2591971.2592000","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T02:55:58Z","timestamp":1750215358000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2591971.2592000"}},"subtitle":["a comparative experimental study"],"short-title":[],"issued":{"date-parts":[[2014,6,16]]},"references-count":56,"alternative-id":["10.1145\/2591971.2592000","10.1145\/2591971"],"URL":"https:\/\/doi.org\/10.1145\/2591971.2592000","relation":{"is-identical-to":[{"id-type":"doi","id":"10.1145\/2637364.2592000","asserted-by":"object"}]},"subject":[],"published":{"date-parts":[[2014,6,16]]},"assertion":[{"value":"2014-06-16","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}