{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:18:06Z","timestamp":1750306686473,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":15,"publisher":"ACM","license":[{"start":{"date-parts":[[2014,6,1]],"date-time":"2014-06-01T00:00:00Z","timestamp":1401580800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2014,6]]},"DOI":"10.1145\/2593069.2593115","type":"proceedings-article","created":{"date-parts":[[2014,5,27]],"date-time":"2014-05-27T12:57:10Z","timestamp":1401195430000},"page":"1-6","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":7,"title":["Critical Path Monitor Enabled Dynamic Voltage Scaling for Graceful Degradation in Sub-Threshold Designs"],"prefix":"10.1145","author":[{"given":"Yu-Guang","family":"Chen","sequence":"first","affiliation":[{"name":"Department of Computer Science, National Tsing Hua University, HsinChu, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Tao","family":"Wang","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, Missouri University of Science and Technology, Rolla, Mo, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kuan-Yu","family":"Lai","sequence":"additional","affiliation":[{"name":"Department of Computer Science, National Tsing Hua University, HsinChu, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Wan-Yu","family":"Wen","sequence":"additional","affiliation":[{"name":"Department of Computer Science, National Tsing Hua University, HsinChu, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yiyu","family":"Shi","sequence":"additional","affiliation":[{"name":"Department of Electrical and Computer Engineering, Missouri University of Science and Technology, Rolla, Mo, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Shih-Chieh","family":"Chang","sequence":"additional","affiliation":[{"name":"Department of Computer Science, National Tsing Hua University, HsinChu, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2014,6]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/1120725.1120878"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/344166.344181"},{"key":"e_1_3_2_1_3_1","unstructured":"Center for Energy Efficient Electronics Science available on line at https:\/\/www.e3s-center.org\/  Center for Energy Efficient Electronics Science available on line at https:\/\/www.e3s-center.org\/"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"crossref","unstructured":"L.N. Chakrapani B.E.S. Akgul S. Cheemalavagu P. Korkmaz K.V. Palem and B. Seshasayee \"Ultra-Efficient (Embedded) SOC Architectures Based on Probabilistic CMOS (PCMOS) Technology \" in Proc. of Design Automation and Test in Europe (DATE) pp.1110--1115 2006.   L.N. Chakrapani B.E.S. Akgul S. Cheemalavagu P. Korkmaz K.V. Palem and B. Seshasayee \"Ultra-Efficient (Embedded) SOC Architectures Based on Probabilistic CMOS (PCMOS) Technology \" in Proc. of Design Automation and Test in Europe (DATE) pp.1110--1115 2006.","DOI":"10.1109\/DATE.2006.243978"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/4.126534"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"crossref","unstructured":"A. Drake R. Senger H. Deogun G. Carpenter S. Ghiasi T. Nguyen N. James M. Floyd and V. Pokala \"A Distributed Critical-Path Timing Monitor for a 65nm High-Performance Microprocessor \" in IEEE International Solid-State Circuits Conference (ISSCC) pp.398--399 2007.  A. Drake R. Senger H. Deogun G. Carpenter S. Ghiasi T. Nguyen N. James M. Floyd and V. Pokala \"A Distributed Critical-Path Timing Monitor for a 65nm High-Performance Microprocessor \" in IEEE International Solid-State Circuits Conference (ISSCC) pp.398--399 2007.","DOI":"10.1109\/ISSCC.2007.373462"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"crossref","unstructured":"M.S. Gupta K.K. Rangan M.D. Smith G.Y. Wei and D. Brooks \"DeCoR: A Delayed Commit and Rollback mechanism for handling inductive noise in processors \" in IEEE International Symposium on High Performance Computer Architecture (HPCA) pp.381--392 Feb 2008.  M.S. Gupta K.K. Rangan M.D. Smith G.Y. Wei and D. Brooks \"DeCoR: A Delayed Commit and Rollback mechanism for handling inductive noise in processors \" in IEEE International Symposium on High Performance Computer Architecture (HPCA) pp.381--392 Feb 2008.","DOI":"10.1109\/HPCA.2008.4658654"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/313817.313834"},{"key":"e_1_3_2_1_9_1","unstructured":"A.B. Kahng S. Kang R. Kumar and J. Sartori \"Slack redistribution for graceful degradation under voltage overscaling \" in Proc. of Asia and South Pacific Design Automation Conference (ASP-DAC) pp.852--831 Jan. 2012.   A.B. Kahng S. Kang R. Kumar and J. Sartori \"Slack redistribution for graceful degradation under voltage overscaling \" in Proc. of Asia and South Pacific Design Automation Conference (ASP-DAC) pp.852--831 Jan. 2012."},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.803957"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2008.02.003"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/2155620.2155622"},{"volume-title":"IEEE Workshop on Silicon Errors in Logic","year":"2009","author":"Narayanan S.","key":"e_1_3_2_1_13_1"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/92.920822"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2005.852658"}],"event":{"name":"DAC '14: The 51st Annual Design Automation Conference 2014","sponsor":["EDAC Electronic Design Automation Consortium","SIGBED ACM Special Interest Group on Embedded Systems","SIGDA ACM Special Interest Group on Design Automation","IEEE-CEDA"],"location":"San Francisco CA USA","acronym":"DAC '14"},"container-title":["Proceedings of the 51st Annual Design Automation Conference"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2593069.2593115","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2593069.2593115","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T07:01:23Z","timestamp":1750230083000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2593069.2593115"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,6]]},"references-count":15,"alternative-id":["10.1145\/2593069.2593115","10.1145\/2593069"],"URL":"https:\/\/doi.org\/10.1145\/2593069.2593115","relation":{},"subject":[],"published":{"date-parts":[[2014,6]]},"assertion":[{"value":"2014-06-01","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}