{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,11]],"date-time":"2026-03-11T01:44:40Z","timestamp":1773193480281,"version":"3.50.1"},"reference-count":33,"publisher":"Association for Computing Machinery (ACM)","issue":"4","license":[{"start":{"date-parts":[[2014,7,27]],"date-time":"2014-07-27T00:00:00Z","timestamp":1406419200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/100002418","name":"Intel Corporation","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100002418","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100005492","name":"Stanford University","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100005492","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100007065","name":"Nvidia","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100007065","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100006785","name":"Google","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100006785","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000185","name":"Defense Advanced Research Projects Agency","doi-asserted-by":"publisher","award":["HR0011-11-C-0007"],"award-info":[{"award-number":["HR0011-11-C-0007"]}],"id":[{"id":"10.13039\/100000185","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100006192","name":"Advanced Scientific Computing Research","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100006192","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Graph."],"published-print":{"date-parts":[[2014,7,27]]},"abstract":"<jats:p>\n            Specialized image signal processors (ISPs) exploit the structure of image processing pipelines to minimize memory bandwidth using the architectural pattern of\n            <jats:italic>line-buffering<\/jats:italic>\n            , where all intermediate data between each stage is stored in small on-chip buffers. This provides high energy efficiency, allowing long pipelines with tera-op\/sec. image processing in battery-powered devices, but traditionally requires painstaking manual design in hardware. Based on this pattern, we present Darkroom, a language and compiler for image processing. The semantics of the Darkroom language allow it to compile programs directly into line-buffered pipelines, with all intermediate values in local line-buffer storage, eliminating unnecessary communication with off-chip DRAM. We formulate the problem of optimally scheduling line-buffered pipelines to minimize buffering as an integer linear program. Finally, given an optimally scheduled pipeline, Darkroom synthesizes hardware descriptions for ASIC or FPGA, or fast CPU code. We evaluate Darkroom implementations of a range of applications, including a camera pipeline, low-level feature detection algorithms, and deblurring. For many applications, we demonstrate gigapixel\/sec. performance in under 0.5mm\n            <jats:sup>2<\/jats:sup>\n            of ASIC silicon at 250 mW (simulated on a 45nm foundry process), real-time 1080p\/60 video processing using a fraction of the resources of a modern FPGA, and tens of megapixels\/sec. of throughput on a quad-core x86 processor.\n          <\/jats:p>","DOI":"10.1145\/2601097.2601174","type":"journal-article","created":{"date-parts":[[2014,7,22]],"date-time":"2014-07-22T15:08:20Z","timestamp":1406041700000},"page":"1-11","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":145,"title":["Darkroom"],"prefix":"10.1145","volume":"33","author":[{"given":"James","family":"Hegarty","sequence":"first","affiliation":[{"name":"Stanford University"}]},{"given":"John","family":"Brunhaver","sequence":"additional","affiliation":[{"name":"Stanford University"}]},{"given":"Zachary","family":"DeVito","sequence":"additional","affiliation":[{"name":"Stanford University"}]},{"given":"Jonathan","family":"Ragan-Kelley","sequence":"additional","affiliation":[{"name":"MIT CSAIL"}]},{"given":"Noy","family":"Cohen","sequence":"additional","affiliation":[{"name":"Stanford University"}]},{"given":"Steven","family":"Bell","sequence":"additional","affiliation":[{"name":"Stanford University"}]},{"given":"Artem","family":"Vasilyev","sequence":"additional","affiliation":[{"name":"Stanford University"}]},{"given":"Mark","family":"Horowitz","sequence":"additional","affiliation":[{"name":"Stanford University"}]},{"given":"Pat","family":"Hanrahan","sequence":"additional","affiliation":[{"name":"Stanford University"}]}],"member":"320","published-online":{"date-parts":[[2014,7,27]]},"reference":[{"key":"e_1_2_2_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/1778765.1778766"},{"key":"e_1_2_2_2_1","unstructured":"Aptina. Aptina MT9P111. http:\/\/www.aptina.com\/products\/soc\/mt9p111\/.  Aptina. Aptina MT9P111. http:\/\/www.aptina.com\/products\/soc\/mt9p111\/."},{"key":"e_1_2_2_3_1","unstructured":"Berkelaar M. Eikland K. Notebaert P. etal 2004. lpsolve: Open source (mixed-integer) linear programming system. Eindhoven U. of Technology.  Berkelaar M. Eikland K. Notebaert P. et al. 2004. lpsolve: Open source (mixed-integer) linear programming system. Eindhoven U. of Technology ."},{"key":"e_1_2_2_4_1","volume-title":"1995 International Conference on Acoustics, Speech, and Signal Processing","volume":"5","author":"Bilsen G."},{"key":"e_1_2_2_5_1","volume-title":"Pyramidal implementation of the affine Lucas Kanade feature tracker description of the algorithm. Tech. rep","author":"Bouguet J.-Y."},{"key":"e_1_2_2_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/TPAMI.1986.4767851"},{"key":"e_1_2_2_7_1","volume-title":"Proceedings of the 2008 ACM\/IEEE conference on Supercomputing, IEEE Press, 4.","author":"Datta K."},{"key":"e_1_2_2_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/2491956.2462166"},{"key":"e_1_2_2_9_1","volume-title":"Proceedings of Bridges.","author":"Elliott C.","year":"2001"},{"key":"e_1_2_2_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/1088149.1088197"},{"key":"e_1_2_2_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2005.32"},{"key":"e_1_2_2_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/1815961.1815968"},{"key":"e_1_2_2_13_1","volume-title":"Proceedings of the 4th Alvey Vision Conference, 147--151","author":"Harris C."},{"key":"e_1_2_2_14_1","volume-title":"Beyond Photography: The Digital Darkroom","author":"Holzmann G.","year":"1988"},{"key":"e_1_2_2_15_1","volume-title":"Proceedings of the Caltech Conference on Very Large Scale Integration.","author":"Kung H. T.","year":"1979"},{"key":"e_1_2_2_16_1","volume-title":"Proceedings of the 2004 International Symposium on Code Generation and Optimization (CGO'04)","author":"Lattner C."},{"key":"e_1_2_2_17_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1987.5009446"},{"key":"e_1_2_2_18_1","doi-asserted-by":"publisher","DOI":"10.1007\/BF01759032"},{"key":"e_1_2_2_19_1","first-page":"674","article-title":"An iterative image registration technique with an application to stereo vision","volume":"81","author":"Lucas B. D.","year":"1981","journal-title":"IJCAI"},{"key":"e_1_2_2_20_1","volume-title":"2012 39th Annual International Symposium on Computer Architecture (ISCA), 37--48","author":"Malladi K."},{"key":"e_1_2_2_21_1","unstructured":"Muralimanohar N. and Balasubramonian R. 2009. Cacti 6.0: A tool to understand large caches. Tech. rep. HP Labs.  Muralimanohar N. and Balasubramonian R. 2009. Cacti 6.0: A tool to understand large caches. Tech. rep. HP Labs."},{"key":"e_1_2_2_22_1","doi-asserted-by":"publisher","DOI":"10.1023\/A:1008633809454"},{"key":"e_1_2_2_23_1","doi-asserted-by":"publisher","DOI":"10.1109\/SC.2010.2"},{"key":"e_1_2_2_24_1","unstructured":"OpenCV. OpenCV. http:\/\/opencv.org\/.  OpenCV. OpenCV. http:\/\/opencv.org\/."},{"key":"e_1_2_2_25_1","unstructured":"Qualcomm. Qualcomm hexagon SDK. https:\/\/developer.qualcomm.com\/mobile-development\/maximize-hardware\/mobile-multimedia-optimization-hexagon-sdk.  Qualcomm. Qualcomm hexagon SDK. https:\/\/developer.qualcomm.com\/mobile-development\/maximize-hardware\/mobile-multimedia-optimization-hexagon-sdk."},{"key":"e_1_2_2_26_1","doi-asserted-by":"publisher","DOI":"10.1145\/2185520.2185528"},{"key":"e_1_2_2_27_1","doi-asserted-by":"publisher","DOI":"10.1145\/2491956.2462176"},{"key":"e_1_2_2_28_1","doi-asserted-by":"publisher","DOI":"10.1364\/JOSA.62.000055"},{"key":"e_1_2_2_29_1","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228472"},{"key":"e_1_2_2_30_1","doi-asserted-by":"publisher","DOI":"10.1145\/192161.192191"},{"key":"e_1_2_2_31_1","doi-asserted-by":"publisher","DOI":"10.1145\/1477926.1477930"},{"key":"e_1_2_2_32_1","doi-asserted-by":"publisher","DOI":"10.1145\/1989493.1989508"},{"key":"e_1_2_2_33_1","unstructured":"Vivado. vivado. http:\/\/www.xilinx.com\/products\/design-tools\/vivado\/integration\/esl-design\/.  Vivado. vivado. http:\/\/www.xilinx.com\/products\/design-tools\/vivado\/integration\/esl-design\/."}],"container-title":["ACM Transactions on Graphics"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2601097.2601174","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2601097.2601174","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T07:19:11Z","timestamp":1750231151000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2601097.2601174"}},"subtitle":["compiling high-level image processing code into hardware pipelines"],"short-title":[],"issued":{"date-parts":[[2014,7,27]]},"references-count":33,"journal-issue":{"issue":"4","published-print":{"date-parts":[[2014,7,27]]}},"alternative-id":["10.1145\/2601097.2601174"],"URL":"https:\/\/doi.org\/10.1145\/2601097.2601174","relation":{},"ISSN":["0730-0301","1557-7368"],"issn-type":[{"value":"0730-0301","type":"print"},{"value":"1557-7368","type":"electronic"}],"subject":[],"published":{"date-parts":[[2014,7,27]]},"assertion":[{"value":"2014-07-27","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}