{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,6]],"date-time":"2026-06-06T01:10:06Z","timestamp":1780708206617,"version":"3.54.1"},"publisher-location":"New York, NY, USA","reference-count":51,"publisher":"ACM","license":[{"start":{"date-parts":[[2014,8,24]],"date-time":"2014-08-24T00:00:00Z","timestamp":1408838400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/100000144","name":"Division of Computer and Network Systems","doi-asserted-by":"publisher","award":["CSR-0912850"],"award-info":[{"award-number":["CSR-0912850"]}],"id":[{"id":"10.13039\/100000144","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000143","name":"Division of Computing and Communication Foundations","doi-asserted-by":"publisher","award":["CCF-1157377"],"award-info":[{"award-number":["CCF-1157377"]}],"id":[{"id":"10.13039\/100000143","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000143","name":"Division of Computing and Communication Foundations","doi-asserted-by":"publisher","award":["CCF-0905509"],"award-info":[{"award-number":["CCF-0905509"]}],"id":[{"id":"10.13039\/100000143","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000143","name":"Division of Computing and Communication Foundations","doi-asserted-by":"publisher","award":["CCF-0963996"],"award-info":[{"award-number":["CCF-0963996"]}],"id":[{"id":"10.13039\/100000143","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2014,8,24]]},"DOI":"10.1145\/2628071.2628074","type":"proceedings-article","created":{"date-parts":[[2014,8,21]],"date-time":"2014-08-21T12:19:23Z","timestamp":1408623563000},"page":"289-300","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":9,"title":["Shuffling"],"prefix":"10.1145","author":[{"given":"Kishore Kumar","family":"Pusukuri","sequence":"first","affiliation":[{"name":"University of California, Riverside, Riverside, CA, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Rajiv","family":"Gupta","sequence":"additional","affiliation":[{"name":"University of California, Riverside, Riverside, CA, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Laxmi N.","family":"Bhuyan","sequence":"additional","affiliation":[{"name":"University of California, Riverside, Riverside, CA, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2014,8,24]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/1810085.1810113"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/1454115.1454128"},{"key":"e_1_3_2_1_3_1","volume-title":"USENIX ATC","author":"Blagodurov S.","year":"2011","unstructured":"S. Blagodurov , S. Zhuravlev , M. Dashti , and A. Fedorova . A Case for NUMA-aware Contention Management on Multicore Systems . In USENIX ATC , 2011 . S. Blagodurov, S. Zhuravlev, M. Dashti, and A. Fedorova. A Case for NUMA-aware Contention Management on Multicore Systems. In USENIX ATC, 2011."},{"key":"e_1_3_2_1_4_1","volume-title":"HotOS","author":"Boyd-Wickizer S.","year":"2009","unstructured":"S. Boyd-Wickizer , R. Morris , and M. F. Kaashoek . Reinventing Scheduling for Multicore Systems . In HotOS , 2009 . S. Boyd-Wickizer, R. Morris, and M. F. Kaashoek. Reinventing Scheduling for Multicore Systems. In HotOS, 2009."},{"key":"e_1_3_2_1_5_1","volume-title":"OSDI","author":"Boyd-Wickizer S.","year":"2008","unstructured":"S. Boyd-Wickizer , H. Chen , R. Chen , Y. Mao , F. Kaashoek , R . Morris , A. Pesterev , L. Stein , M. Wu , Y. D. Y. Zhang , and Z. Zhang . Corey: An operating system for many cores . In OSDI , 2008 . S. Boyd-Wickizer, H. Chen, R. Chen, Y. Mao, F. Kaashoek, R .Morris, A. Pesterev, L. Stein, M. Wu, Y. D. Y. Zhang, and Z. Zhang. Corey: An operating system for many cores. In OSDI, 2008."},{"key":"e_1_3_2_1_6_1","volume-title":"OSDI","author":"Boyd-Wickizer S.","year":"2010","unstructured":"S. Boyd-Wickizer , A. T. Clements , Y. Mao , A. Pesterev , F. Kaashoek , R. Morris , and N. Zeldovich . An Analysis of Linux Scalability to Many Cores . In OSDI , 2010 . S. Boyd-Wickizer, A. T. Clements, Y. Mao, A. Pesterev, F. Kaashoek, R.Morris, and N. Zeldovich. An Analysis of Linux Scalability to Many Cores. In OSDI, 2010."},{"key":"e_1_3_2_1_7_1","volume-title":"SEDMS","author":"Brecht T.","year":"1993","unstructured":"T. Brecht . On the Importance of Parallel Application Placement in NUMA Multiprocessors . In SEDMS , 1993 . T. Brecht. On the Importance of Parallel Application Placement in NUMA Multiprocessors. In SEDMS, 1993."},{"key":"e_1_3_2_1_8_1","volume-title":"USENIX ATC","author":"Cantrill B.","year":"2004","unstructured":"B. Cantrill , M. Shapiro , and A. Leventhal . Dynamic instrumentation of production systems . In USENIX ATC , 2004 . B. Cantrill, M. Shapiro, and A. Leventhal. Dynamic instrumentation of production systems. In USENIX ATC, 2004."},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/195473.195485"},{"key":"e_1_3_2_1_10_1","volume-title":"HPC-Asia","author":"Chen J.","year":"2007","unstructured":"J. Chen , W. Watson , and W. Mao . Multi-Threading Performance on Commodity Multi-core Processors . In HPC-Asia , 2007 . J. Chen, W. Watson, and W. Mao. Multi-Threading Performance on Commodity Multi-core Processors. In HPC-Asia, 2007."},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/782814.782833"},{"key":"e_1_3_2_1_12_1","volume-title":"OSDI","author":"Corbalan J.","year":"2000","unstructured":"J. Corbalan , X. Martorell , and J. Labarta . Performance-driven processor allocation . In OSDI , 2000 . J. Corbalan, X. Martorell, and J. Labarta. Performance-driven processor allocation. In OSDI, 2000."},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/2400682.2400703"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/1989493.1989502"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/2145816.2145848"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/2168836.2168873"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2005.130"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/107971.107985"},{"key":"e_1_3_2_1_19_1","volume-title":"USENIX ATC","author":"Jean-Pierre L.","year":"2012","unstructured":"L. Jean-Pierre , D. Florian , T. Ga\u00ebl , L. Julia and M. Gilles . Remote core locking: migrating critical-section execution to improve the performance of multithreaded applications . In USENIX ATC , 2012 . L. Jean-Pierre, D. Florian, T. Ga\u00ebl, L. Julia and M. Gilles. Remote core locking: migrating critical-section execution to improve the performance of multithreaded applications. In USENIX ATC, 2012."},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/2150976.2151001"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1145\/1736020.1736035"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2008.48"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1109\/71.180624"},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1145\/1993478.1993481"},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1145\/2155620.2155650"},{"key":"e_1_3_2_1_26_1","volume-title":"Solaris Internals","author":"McDougall R.","year":"2006","unstructured":"R. McDougall and J. Mauro . Solaris Internals . Prentice Hall Publications , Second Edition , 2006 . R. McDougall and J. Mauro. Solaris Internals. Prentice Hall Publications, Second Edition, 2006."},{"key":"e_1_3_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2005.390"},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1145\/377769.377780"},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1145\/1755913.1755930"},{"key":"e_1_3_2_1_30_1","unstructured":"PBZIP2. http:\/\/compression.ca\/pbzip2\/  PBZIP2. http:\/\/compression.ca\/pbzip2\/"},{"key":"e_1_3_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1145\/2016604.2016647"},{"key":"e_1_3_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2011.6114208"},{"key":"e_1_3_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.2011.8"},{"key":"e_1_3_2_1_34_1","volume-title":"USENIX HotPar","author":"Pusukuri K.K.","year":"2013","unstructured":"K.K. Pusukuri and D. Johnson . Has one-thread-per-core binding model become obsolete for multithreaded programs running on multicore systems . In USENIX HotPar , 2013 . K.K. Pusukuri and D. Johnson. Has one-thread-per-core binding model become obsolete for multithreaded programs running on multicore systems. In USENIX HotPar, 2013."},{"key":"e_1_3_2_1_36_1","volume-title":"WMPI","author":"Radovic Z.","year":"2012","unstructured":"Z. Radovic and E. Hagersten . RH Lock: A Scalable Hierarchical Spin Lock . In WMPI , 2012 . Z. Radovic and E. Hagersten. RH Lock: A Scalable Hierarchical Spin Lock. In WMPI, 2012."},{"key":"e_1_3_2_1_37_1","doi-asserted-by":"publisher","DOI":"10.1145\/2370816.2370833"},{"key":"e_1_3_2_1_38_1","doi-asserted-by":"publisher","DOI":"10.5555\/645607.661687"},{"key":"e_1_3_2_1_39_1","doi-asserted-by":"publisher","DOI":"10.1145\/378993.379244"},{"key":"e_1_3_2_1_40_1","volume-title":"Workshop on Operating System Interference in High Performance Applications","author":"Sridharan S.","year":"2006","unstructured":"S. Sridharan , B. Keck , R. Murphy , S. Chandra , and P. Kogge . Thread migration to improve synchronization performance . In Workshop on Operating System Interference in High Performance Applications , 2006 . S. Sridharan, B. Keck, R. Murphy, S. Chandra, and P. Kogge. Thread migration to improve synchronization performance. In Workshop on Operating System Interference in High Performance Applications, 2006."},{"key":"e_1_3_2_1_41_1","unstructured":"SPEC and the benchmark names SPEC OMP2001 SPEC jbb2005 are registered trademarks of the Standard Performance Evaluation Corporation. For more information see www.spec.org.  SPEC and the benchmark names SPEC OMP2001 SPEC jbb2005 are registered trademarks of the Standard Performance Evaluation Corporation. For more information see www.spec.org."},{"key":"e_1_3_2_1_42_1","volume-title":"ISCA","author":"Sweazey P.","year":"1986","unstructured":"P. Sweazey and A. J. Smith . A Class of Compatible Cache Consistency Protocols and Their Support by the IEEE Futurebus . In ISCA , 1986 . P. Sweazey and A. J. Smith. A Class of Compatible Cache Consistency Protocols and Their Support by the IEEE Futurebus. In ISCA, 1986."},{"key":"e_1_3_2_1_43_1","doi-asserted-by":"publisher","DOI":"10.1145\/1272996.1273004"},{"key":"e_1_3_2_1_44_1","doi-asserted-by":"publisher","DOI":"10.1145\/2000064.2000099"},{"key":"e_1_3_2_1_45_1","doi-asserted-by":"publisher","DOI":"10.1145\/2259016.2259018"},{"key":"e_1_3_2_1_46_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2013.6522318"},{"key":"e_1_3_2_1_47_1","doi-asserted-by":"publisher","DOI":"10.1145\/191995.192027"},{"key":"e_1_3_2_1_48_1","unstructured":"VMware ESX Server 2 NUMA Support. White paper. http:\/\/www.vmware.com\/pdf\/esx2_NUMA.pdf.  VMware ESX Server 2 NUMA Support. White paper. http:\/\/www.vmware.com\/pdf\/esx2_NUMA.pdf."},{"key":"e_1_3_2_1_49_1","doi-asserted-by":"publisher","DOI":"10.1145\/223982.223990"},{"key":"e_1_3_2_1_50_1","doi-asserted-by":"publisher","DOI":"10.1145\/1449764.1449778"},{"key":"e_1_3_2_1_51_1","doi-asserted-by":"publisher","DOI":"10.1109\/CCGrid.2012.139"},{"key":"e_1_3_2_1_52_1","doi-asserted-by":"publisher","DOI":"10.1145\/1736020.1736036"}],"event":{"name":"PACT '14: International Conference on Parallel Architectures and Compilation","location":"Edmonton AB Canada","acronym":"PACT '14","sponsor":["IFIP WG 10.3 IFIP WG 10.3","SIGARCH ACM Special Interest Group on Computer Architecture","IEEE CS TCPP IEEE Computer Society Technical Committee on Parallel Processing","IEEE CS TCAA IEEE CS technical committee on architectural acoustics"]},"container-title":["Proceedings of the 23rd international conference on Parallel architectures and compilation"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2628071.2628074","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2628071.2628074","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T07:19:38Z","timestamp":1750231178000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2628071.2628074"}},"subtitle":["a framework for lock contention aware thread scheduling for multicore multiprocessor systems"],"short-title":[],"issued":{"date-parts":[[2014,8,24]]},"references-count":51,"alternative-id":["10.1145\/2628071.2628074","10.1145\/2628071"],"URL":"https:\/\/doi.org\/10.1145\/2628071.2628074","relation":{},"subject":[],"published":{"date-parts":[[2014,8,24]]},"assertion":[{"value":"2014-08-24","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}