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Our design methodology is based on sets of configurable building blocks that provide storage, dataflow, computation, and control. Based on our building blocks, we generate hundreds of thousands of our dynamic streaming engine processors that we call DSEs. We store our DSEs in a repository that can be queried for (online) design space exploration. From this repository, DSEs can be downloaded and instantiated within milliseconds on FPGAs. If a loss of flexibility can be tolerated then ASIC implementations are feasible as well. In this article we focus on FPGA implementations. Our DSEs vary in cores, computational lanes, bitwidths, power consumption, and frequency. To the best of our knowledge we are the first to propose online design space exploration based on repositories of precompiled cores that are assembled of common building blocks. For demonstration purposes we map algorithms for image processing and financial mathematics to DSEs and compare the performance to existing highly optimized signal and graphics accelerators.<\/jats:p>","DOI":"10.1145\/2655238","type":"journal-article","created":{"date-parts":[[2014,8,29]],"date-time":"2014-08-29T13:03:31Z","timestamp":1409317411000},"page":"1-16","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":1,"title":["RIVER"],"prefix":"10.1145","volume":"7","author":[{"given":"Christian","family":"Brugger","sequence":"first","affiliation":[{"name":"University of Kaiserslautern, Germany"}]},{"given":"Dominic","family":"Hillenbrand","sequence":"additional","affiliation":[{"name":"Waseda University, Tokyo, Japan"}]},{"given":"Matthias","family":"Balzer","sequence":"additional","affiliation":[{"name":"Karlsruhe Institute of Technology, Germany"}]}],"member":"320","published-online":{"date-parts":[[2014,9,3]]},"reference":[{"volume-title":"Proceedings of the 31st Annual International Symposium on Computer Architecture (ISCA'04)","author":"Ahn J. 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