{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:18:44Z","timestamp":1750306724690,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":26,"publisher":"ACM","license":[{"start":{"date-parts":[[2014,10,12]],"date-time":"2014-10-12T00:00:00Z","timestamp":1413072000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/501100002855","name":"Ministry of Science and Technology of the People's Republic of China","doi-asserted-by":"publisher","award":["2012AA012202"],"award-info":[{"award-number":["2012AA012202"]}],"id":[{"id":"10.13039\/501100002855","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100002367","name":"Chinese Academy of Sciences","doi-asserted-by":"publisher","award":["XDA06010403"],"award-info":[{"award-number":["XDA06010403"]}],"id":[{"id":"10.13039\/501100002367","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["61100163, 61133004, 61222204, 61221062, 61303158"],"award-info":[{"award-number":["61100163, 61133004, 61222204, 61221062, 61303158"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2014,10,12]]},"DOI":"10.1145\/2656106.2656109","type":"proceedings-article","created":{"date-parts":[[2014,10,14]],"date-time":"2014-10-14T12:29:24Z","timestamp":1413289764000},"page":"1-10","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":6,"title":["A low-cost memory interface for high-throughput accelerators"],"prefix":"10.1145","author":[{"given":"Jing","family":"Huang","sequence":"first","affiliation":[{"name":"Chinese Academy of Sciences, Beijing China and University of Chinese Academy of Sciences, Beijing, China and Loongson Technology Corporation Limited, Beijing, China"}]},{"given":"Yuanjie","family":"Huang","sequence":"additional","affiliation":[{"name":"Chinese Academy of Sciences, Beijing China and University of Chinese Academy of Sciences, Beijing, China"}]},{"given":"Olivier","family":"Temam","sequence":"additional","affiliation":[{"name":"INRIA, Saclay, France"}]},{"given":"Paolo","family":"Ienne","sequence":"additional","affiliation":[{"name":"EPFL, Switzerland"}]},{"given":"Yunji","family":"Chen","sequence":"additional","affiliation":[{"name":"Chinese Academy of Sciences, Beijing China"}]},{"given":"Chengyong","family":"Wu","sequence":"additional","affiliation":[{"name":"Chinese Academy of Sciences, Beijing China"}]}],"member":"320","published-online":{"date-parts":[[2014,10,12]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1987.1676901"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/774789.774805"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/71.615440"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2007.35"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2008.33"},{"key":"e_1_3_2_1_6_1","first-page":"414","volume-title":"A Scalable High-Performance DMA Architecture for DSP Applications","author":"Comisky D.","year":"2000","unstructured":"D. Comisky and C. Fuoco , \" A Scalable High-Performance DMA Architecture for DSP Applications ,\" p. 414 , Sep. 2000 . D. Comisky and C. Fuoco, \"A Scalable High-Performance DMA Architecture for DSP Applications,\" p. 414, Sep. 2000."},{"key":"e_1_3_2_1_7_1","volume-title":"Leveraging the Error Resilience of Machine-Learning Applications for Designing Highly Energy Efficient Accelerators,\" in Asia and South Pacific Design Automation Conference","author":"Du Z.","year":"2014","unstructured":"Z. Du , A. Lingamneni , Y. Chen , K. V. Palem , O. Temam , and C. Wu , \" Leveraging the Error Resilience of Machine-Learning Applications for Designing Highly Energy Efficient Accelerators,\" in Asia and South Pacific Design Automation Conference , 2014 . Z. Du, A. Lingamneni, Y. Chen, K. V. Palem, O. Temam, and C. Wu, \"Leveraging the Error Resilience of Machine-Learning Applications for Designing Highly Energy Efficient Accelerators,\" in Asia and South Pacific Design Automation Conference, 2014."},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/2000064.2000108"},{"key":"e_1_3_2_1_9_1","first-page":"313","volume-title":"IEEE Computer Society","author":"Fan K.","year":"2009","unstructured":"K. Fan , M. Kudlur , G. S. Dasika , and S. A. Mahlke , \" Bridging the computation gap between programmable processors and hardwired accelerators,\" in HPCA . IEEE Computer Society , 2009 , pp. 313 -- 322 . K. Fan, M. Kudlur, G. S. Dasika, and S. A. Mahlke, \"Bridging the computation gap between programmable processors and hardwired accelerators,\" in HPCA. IEEE Computer Society, 2009, pp. 313--322."},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996634"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/1878921.1878939"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/1815961.1815968"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/2435264.2435296"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/280814.280837"},{"key":"e_1_3_2_1_15_1","volume-title":"Tech. Rep.","author":"Kathail V.","year":"2005","unstructured":"V. Kathail , \"Creating power-efficient application engines for SoC design,\" Synfora Inc ., Tech. Rep. , 2005 . V. Kathail, \"Creating power-efficient application engines for SoC design,\" Synfora Inc., Tech. Rep., 2005."},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2006.37"},{"key":"e_1_3_2_1_17_1","unstructured":"M. Muller \"Dark Silicon and the Internet \" in EE Times \"Designing with ARM\" virtual conference 2010.  M. Muller \"Dark Silicon and the Internet \" in EE Times \"Designing with ARM\" virtual conference 2010."},{"key":"e_1_3_2_1_18_1","volume-title":"Reducing design complexity of the load\/store queue,\" in Proceedings of the 36th Annual IEEE\/ACM International Symposium on Microarchitecture (MICRO'03)","author":"Park I.","year":"2003","unstructured":"I. Park , C.-l. Ooi , and T. N. Vijaykumar , \" Reducing design complexity of the load\/store queue,\" in Proceedings of the 36th Annual IEEE\/ACM International Symposium on Microarchitecture (MICRO'03) , 2003 . I. Park, C.-l. Ooi, and T. N. Vijaykumar, \"Reducing design complexity of the load\/store queue,\" in Proceedings of the 36th Annual IEEE\/ACM International Symposium on Microarchitecture (MICRO'03), 2003."},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/309758.309771"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/2485922.2485925"},{"key":"e_1_3_2_1_21_1","volume-title":"Assigning program and data objects to scratchpad for energy reduction,\" in Proceedings of the conference on Design, automation and test in Europe","author":"Wehmeyer S. S., L.","year":"2002","unstructured":"S. S., L. Wehmeyer , B. Lee , and P. Marwedel , \" Assigning program and data objects to scratchpad for energy reduction,\" in Proceedings of the conference on Design, automation and test in Europe , 2002 . S. S., L. Wehmeyer, B. Lee, and P. Marwedel, \"Assigning program and data objects to scratchpad for energy reduction,\" in Proceedings of the conference on Design, automation and test in Europe, 2002."},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2005.29"},{"key":"e_1_3_2_1_23_1","volume-title":"Coarse-Grained Reconfigurable Array Architectures,\" Elements, no. 1","author":"Sutter B. D.","year":"2010","unstructured":"B. D. Sutter , P. Raghavan , and A. Lambrechts , \" Coarse-Grained Reconfigurable Array Architectures,\" Elements, no. 1 , 2010 . B. D. Sutter, P. Raghavan, and A. Lambrechts, \"Coarse-Grained Reconfigurable Array Architectures,\" Elements, no. 1, 2010."},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1145\/2155620.2155640"},{"key":"e_1_3_2_1_25_1","first-page":"61","volume-title":"2004 International Conference on. IEEE","author":"Wang N. J.","year":"2004","unstructured":"N. J. Wang , J. Quek , T. M. Rafacz , and S. J. Patel , \" Characterizing the effects of transient faults on a high-performance processor pipeline,\" in Dependable Systems and Networks , 2004 International Conference on. IEEE , 2004 , pp. 61 -- 70 . N. J. Wang, J. Quek, T. M. Rafacz, and S. J. Patel, \"Characterizing the effects of transient faults on a high-performance processor pipeline,\" in Dependable Systems and Networks, 2004 International Conference on. IEEE, 2004, pp. 61--70."},{"key":"e_1_3_2_1_26_1","first-page":"277","volume-title":"Reconciling specialization and flexibility through compound circuits,\" in International Symposium on High Performance Computer Architecture","author":"Yehia S.","year":"2009","unstructured":"S. Yehia , S. Girbal , H. Berry , and O. Temam , \" Reconciling specialization and flexibility through compound circuits,\" in International Symposium on High Performance Computer Architecture . Raleigh, North Carolina : Ieee , Feb. 2009 , pp. 277 -- 288 . S. Yehia, S. Girbal, H. Berry, and O. Temam, \"Reconciling specialization and flexibility through compound circuits,\" in International Symposium on High Performance Computer Architecture. Raleigh, North Carolina: Ieee, Feb. 2009, pp. 277--288."}],"event":{"name":"ESWEEK'14: TENTH EMBEDDED SYSTEM WEEK","sponsor":["SIGBED ACM Special Interest Group on Embedded Systems","SIGDA ACM Special Interest Group on Design Automation","IEEE CAS","IEEE Council on Electronic Design Automation (CEDA)","SIGMICRO ACM Special Interest Group on Microarchitectural Research and Processing"],"location":"New Delhi India","acronym":"ESWEEK'14"},"container-title":["Proceedings of the 2014 International Conference on Compilers, Architecture and Synthesis for Embedded Systems"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2656106.2656109","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2656106.2656109","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T07:19:36Z","timestamp":1750231176000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2656106.2656109"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,10,12]]},"references-count":26,"alternative-id":["10.1145\/2656106.2656109","10.1145\/2656106"],"URL":"https:\/\/doi.org\/10.1145\/2656106.2656109","relation":{},"subject":[],"published":{"date-parts":[[2014,10,12]]},"assertion":[{"value":"2014-10-12","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}