{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:18:44Z","timestamp":1750306724741,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":23,"publisher":"ACM","license":[{"start":{"date-parts":[[2014,10,12]],"date-time":"2014-10-12T00:00:00Z","timestamp":1413072000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2014,10,12]]},"DOI":"10.1145\/2656106.2656121","type":"proceedings-article","created":{"date-parts":[[2014,10,14]],"date-time":"2014-10-14T12:29:24Z","timestamp":1413289764000},"page":"1-10","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":2,"title":["EnVM"],"prefix":"10.1145","author":[{"given":"Pooja","family":"Roy","sequence":"first","affiliation":[{"name":"National University of Singapore"}]},{"given":"Manmohan","family":"Manoharan","sequence":"additional","affiliation":[{"name":"National University of Singapore"}]},{"given":"Weng Fai","family":"Wong","sequence":"additional","affiliation":[{"name":"National University of Singapore"}]}],"member":"320","published-online":{"date-parts":[[2014,10,12]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.5555\/2016802.2016826"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/2333660.2333717"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/2248487.1950380"},{"issue":"7","key":"e_1_3_2_1_4_1","first-page":"994","article-title":"Nvsim: A circuit-level performance, energy, and area model for emerging nonvolatile memory. Computer-Aided Design of Integrated Circuits and Systems","volume":"31","author":"Dong X.","year":"2012","journal-title":"IEEE Transactions on"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.5555\/1950815.1950854"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.5555\/2016802.2016827"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228406"},{"key":"e_1_3_2_1_8_1","first-page":"136","volume-title":"Automation Test in Europe Conference Exhibition (DATE), 2010","author":"Joo Y.","year":"2010"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/1290520.1290521"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/2333660.2333738"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/2248418.2248434"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2008.2"},{"issue":"1","key":"e_1_3_2_1_13_1","first-page":"54","article-title":"Sttram scaling and retention failure","volume":"17","author":"Naeimi H.","year":"2013","journal-title":"Intel Technology Journal"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/1543135.1542521"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/2024724.2024954"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/1353445.1353447"},{"volume-title":"http:\/\/www.spec.org\/cpu2006\/","year":"2006","author":"EC.","key":"e_1_3_2_1_17_1"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2009.4798259"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/2155620.2155659"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.5555\/1874620.1874803"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1145\/192724.192725"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1145\/2039370.2039420"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1145\/1687399.1687448"}],"event":{"name":"ESWEEK'14: TENTH EMBEDDED SYSTEM WEEK","sponsor":["SIGBED ACM Special Interest Group on Embedded Systems","SIGDA ACM Special Interest Group on Design Automation","IEEE CAS","IEEE Council on Electronic Design Automation (CEDA)","SIGMICRO ACM Special Interest Group on Microarchitectural Research and Processing"],"location":"New Delhi India","acronym":"ESWEEK'14"},"container-title":["Proceedings of the 2014 International Conference on Compilers, Architecture and Synthesis for Embedded Systems"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2656106.2656121","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2656106.2656121","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T07:19:36Z","timestamp":1750231176000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2656106.2656121"}},"subtitle":["virtual memory design for new memory architectures"],"short-title":[],"issued":{"date-parts":[[2014,10,12]]},"references-count":23,"alternative-id":["10.1145\/2656106.2656121","10.1145\/2656106"],"URL":"https:\/\/doi.org\/10.1145\/2656106.2656121","relation":{},"subject":[],"published":{"date-parts":[[2014,10,12]]},"assertion":[{"value":"2014-10-12","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}