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Syst."],"published-print":{"date-parts":[[2015,5,19]]},"abstract":"<jats:p>Multiprocessor systems-on-chip (MPSoCs) are becoming a popular design choice in current and future technology nodes to accommodate the heterogeneous computing demand of a multitude of applications enabled on these platform. Streaming multimedia and other communication-centric applications constitute a significant fraction of the application space of these devices. The mapping of an application on an MPSoC is an NP-hard problem. This has attracted researchers to solve this problem both as stand-alone (best-effort) and in conjunction with other optimization objectives, such as energy and reliability. Most existing studies on energy-reliability joint optimization are static\u2014that is, design time based. These techniques fail to capture runtime variability such as resource unavailability and dynamism associated with application behaviors, which are typical of multimedia applications. The few studies that consider dynamic mapping of applications do not consider throughput degradation, which directly impacts user satisfaction. This article proposes a runtime technique to analyze the execution trace of an application modeled as Synchronous Data Flow Graphs (SDFGs) to determine its mapping on a multiprocessor system with heterogeneous processing units for different fault scenarios. Further, communication energy is minimized for each of these mappings while satisfying the throughput constraint. Experiments conducted with synthetic and real SDFGs demonstrate that the proposed technique achieves significant improvement with respect to the state-of-the-art approaches in terms of throughput and storage overhead with less than 20% energy overhead.<\/jats:p>","DOI":"10.1145\/2665071","type":"journal-article","created":{"date-parts":[[2015,5,5]],"date-time":"2015-05-05T12:32:26Z","timestamp":1430829146000},"page":"1-19","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":10,"title":["Execution Trace--Driven Energy-Reliability Optimization for Multimedia MPSoCs"],"prefix":"10.1145","volume":"8","author":[{"given":"Anup","family":"Das","sequence":"first","affiliation":[{"name":"National University of Singapore"}]},{"given":"Amit Kumar","family":"Singh","sequence":"additional","affiliation":[{"name":"National University of Singapore"}]},{"given":"Akash","family":"Kumar","sequence":"additional","affiliation":[{"name":"National University of Singapore, Singapore"}]}],"member":"320","published-online":{"date-parts":[[2015,5,4]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/ReCoSoC.2012.6322885"},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996588"},{"volume-title":"Proceedings of the Conference on Design, Automation, and Test in Europe (DATE\u201911)","author":"Chou C.-L.","key":"e_1_2_1_3_1","unstructured":"C.-L. Chou and R. Marculescu . 2011. FARM: Fault-aware resource management in NoC-based multiprocessor platforms . In Proceedings of the Conference on Design, Automation, and Test in Europe (DATE\u201911) . 1--6. C.-L. Chou and R. Marculescu. 2011. FARM: Fault-aware resource management in NoC-based multiprocessor platforms. In Proceedings of the Conference on Design, Automation, and Test in Europe (DATE\u201911). 1--6."},{"volume-title":"Proceedings of the IEEE International Symposium on Rapid System Prototyping (RSP\u201912)","author":"Das A.","key":"e_1_2_1_4_1","unstructured":"A. Das and A. Kumar . 2012. Fault-aware task re-mapping for throughput constrained multimedia applications on NoC-based MPSoCs . In Proceedings of the IEEE International Symposium on Rapid System Prototyping (RSP\u201912) . A. Das and A. Kumar. 2012. Fault-aware task re-mapping for throughput constrained multimedia applications on NoC-based MPSoCs. In Proceedings of the IEEE International Symposium on Rapid System Prototyping (RSP\u201912)."},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICPADS.2012.82"},{"key":"e_1_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.5555\/2485288.2485676"},{"volume-title":"Proceedings of the International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC\u201913)","author":"Das A.","key":"e_1_2_1_7_1","unstructured":"A. Das , A. Kumar Singh , and A. Kumar . 2013b. Energy-aware dynamic reconfiguration of communication-centric applications for reliable MPSoCs . In Proceedings of the International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC\u201913) . 1--7. A. Das, A. Kumar Singh, and A. Kumar. 2013b. Energy-aware dynamic reconfiguration of communication-centric applications for reliable MPSoCs. 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An area-efficient partially reconfigurable crossbar switch with low reconfiguration delay. In Proceedings of the International Conference on Field Programmable Logic and Applications (FPL\u201912). DOI:http:\/\/dx.doi.org\/10.1109\/FPL.2012.6339136"},{"volume-title":"Proceedings of the Conference on Design, Automation, and Test in Europe (DATE\u201904)","author":"Hu J.","key":"e_1_2_1_12_1","unstructured":"J. Hu and R. Marculescu . 2004. Energy-aware communication and task scheduling for network-on-chip architectures under real-time constraints . In Proceedings of the Conference on Design, Automation, and Test in Europe (DATE\u201904) . J. Hu and R. Marculescu. 2004. Energy-aware communication and task scheduling for network-on-chip architectures under real-time constraints. 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