{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:16:10Z","timestamp":1750306570284,"version":"3.41.0"},"reference-count":45,"publisher":"Association for Computing Machinery (ACM)","issue":"1","license":[{"start":{"date-parts":[[2014,11,18]],"date-time":"2014-11-18T00:00:00Z","timestamp":1416268800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/501100004663","name":"Ministry of Science and Technology, Taiwan","doi-asserted-by":"publisher","award":["103-2220-E-007-019"],"award-info":[{"award-number":["103-2220-E-007-019"]}],"id":[{"id":"10.13039\/501100004663","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100004725","name":"Ministry of Economic Affairs","doi-asserted-by":"publisher","award":["103-EC-17-A-02-S1-202"],"award-info":[{"award-number":["103-EC-17-A-02-S1-202"]}],"id":[{"id":"10.13039\/501100004725","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Des. Autom. Electron. Syst."],"published-print":{"date-parts":[[2014,11,18]]},"abstract":"<jats:p>Multithread programming is widely adopted in novel embedded system applications due to its high performance and flexibility. This article addresses compiler optimization for reducing the power consumption of multithread programs. A traditional compiler employs energy management techniques that analyze component usage in control-flow graphs with a focus on single-thread programs. In this environment the leakage power can be controlled by inserting on and off instructions based on component usage information generated by flow equations. However, these methods cannot be directly extended to a multithread environment due to concurrent execution issues.<\/jats:p>\n          <jats:p>\n            This article presents a multithread power-gating framework composed of\n            <jats:italic>multithread power-gating analysis<\/jats:italic>\n            (MTPGA) and\n            <jats:italic>predicated power-gating<\/jats:italic>\n            (PPG) energy management mechanisms for reducing the leakage power when executing multithread programs on\n            <jats:italic>simultaneous multithreading<\/jats:italic>\n            (SMT) machines. Our multithread programming model is based on hierarchical bulk-synchronous parallel (BSP) models. Based on a multithread component analysis with dataflow equations, our MTPGA framework estimates the energy usage of multithread programs and inserts PPG operations as power controls for energy management. We performed experiments by incorporating our power optimization framework into SUIF compiler tools and by simulating the energy consumption with a post-estimated SMT simulator based on Wattch toolkits. The experimental results show that the total energy consumption of a system with PPG support and our power optimization method is reduced by an average of 10.09% for BSP programs relative to a system without a power-gating mechanism on leakage contribution set to 30%; and the total energy consumption is reduced by an average of 4.27% on leakage contribution set to 10%. The results demonstrate our mechanisms are effective in reducing the leakage energy of BSP multithread programs.\n          <\/jats:p>","DOI":"10.1145\/2668119","type":"journal-article","created":{"date-parts":[[2014,11,24]],"date-time":"2014-11-24T15:29:41Z","timestamp":1416842981000},"page":"1-34","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":6,"title":["Compiler Optimization for Reducing Leakage Power in Multithread BSP Programs"],"prefix":"10.1145","volume":"20","author":[{"given":"Wen-Li","family":"Shih","sequence":"first","affiliation":[{"name":"National Tsing Hua University, Hsinchu, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yi-Ping","family":"You","sequence":"additional","affiliation":[{"name":"National Chiao Tung University, Hsinchu, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chung-Wen","family":"Huang","sequence":"additional","affiliation":[{"name":"National Tsing Hua University, Hsinchu, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jenq Kuen","family":"Lee","sequence":"additional","affiliation":[{"name":"National Tsing Hua University, Hsinchu, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2014,11,18]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-69330-7_11"},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/92.845897"},{"key":"e_1_2_1_3_1","doi-asserted-by":"crossref","unstructured":"R. H. Bisseling. 2004. Parallel Scientific Computation: A Structured Approach using BSP and MPI. Oxford University Press.   R. H. Bisseling. 2004. Parallel Scientific Computation: A Structured Approach using BSP and MPI. Oxford University Press.","DOI":"10.1093\/acprof:oso\/9780198529392.001.0001"},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/360128.360148"},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/68210.69225"},{"key":"e_1_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1023\/A:1008113017444"},{"key":"e_1_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/4.126534"},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/217474.217502"},{"volume-title":"Proceedings of the 3rd International ICST Conference on Simulation Tools and Techniques (SIMUTools'10)","author":"Cordeiro D.","key":"e_1_2_1_9_1"},{"volume-title":"Proceedings of the 35th International Symposium on Microarchitecture (MICRO'02)","author":"Dropsho S.","key":"e_1_2_1_10_1"},{"key":"e_1_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/120807.120811"},{"volume-title":"Proceedings of the 11th International Forum on Embedded MPSoC and Multicore (MPSoC'11)","year":"2011","author":"Goodacre J.","key":"e_1_2_1_12_1"},{"volume-title":"Proceedings of the IEEE Symposium on Low Power Electronics. 8--11","author":"Horowitz M.","key":"e_1_2_1_13_1"},{"volume-title":"Proceedings of the 13th Annual International Symposium on Computer Architecture (ISCA'86)","author":"Hsu P. Y. T.","key":"e_1_2_1_14_1"},{"key":"e_1_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/1013235.1013249"},{"key":"e_1_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/4.848210"},{"key":"e_1_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1023\/A:1026511306490"},{"key":"e_1_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/762488.762494"},{"key":"e_1_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/1854273.1854301"},{"key":"e_1_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/2442087.2442096"},{"key":"e_1_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/92.555992"},{"key":"e_1_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1007\/11532378_15"},{"key":"e_1_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1145\/997163.997178"},{"key":"e_1_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1145\/155332.155346"},{"key":"e_1_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.5555\/646668.700792"},{"key":"e_1_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1145\/288195.288213"},{"key":"e_1_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.5555\/318773.319252"},{"key":"e_1_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1145\/349214.349241"},{"volume-title":"Proceedings of the 11th International Conference on Compiler Construction (CC'02)","author":"Rele S.","key":"e_1_2_1_29_1"},{"key":"e_1_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.885041"},{"volume-title":"Proceedings of the 28th Annual Hawaii International Conference on System Sciences (HICSS'95)","author":"Su C.-L.","key":"e_1_2_1_31_1"},{"key":"e_1_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.1007\/BF00263928"},{"volume-title":"Proceedings of the International Conference on VLSI Design (VLSID'97)","author":"Tiwari V.","key":"e_1_2_1_33_1"},{"key":"e_1_2_1_34_1","doi-asserted-by":"publisher","DOI":"10.1145\/277044.277227"},{"volume":"2","volume-title":"Proceedings of the 2nd International Euro-Par Conference on Parallel Processing (Euro-Par'96)","author":"Torre P. D. L.","key":"e_1_2_1_35_1"},{"key":"e_1_2_1_36_1","doi-asserted-by":"publisher","DOI":"10.1145\/79173.79181"},{"key":"e_1_2_1_37_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-87744-8_2"},{"key":"e_1_2_1_38_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.jcss.2010.06.012"},{"volume-title":"Proceedings of the 3rd Workshop on Compilers and Operating Systems for Low Power (COLP'02)","author":"Yang H.","key":"e_1_2_1_39_1"},{"key":"e_1_2_1_40_1","doi-asserted-by":"publisher","DOI":"10.1145\/1086228.1086252"},{"key":"e_1_2_1_41_1","doi-asserted-by":"publisher","DOI":"10.1145\/1278349.1278364"},{"key":"e_1_2_1_42_1","doi-asserted-by":"publisher","DOI":"10.1007\/11596110_4"},{"key":"e_1_2_1_43_1","doi-asserted-by":"publisher","DOI":"10.1145\/1124713.1124723"},{"volume-title":"Proceedings of the 6th Design Automation and Test in Europe Conference (DATE'03)","author":"Zhang W.","key":"e_1_2_1_44_1"},{"volume-title":"Proceedings of 5th International Conference on Signal Processing Applications and Technology.","author":"Zivojnovic V.","key":"e_1_2_1_45_1"}],"container-title":["ACM Transactions on Design Automation of Electronic Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2668119","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2668119","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T06:13:22Z","timestamp":1750227202000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2668119"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,11,18]]},"references-count":45,"journal-issue":{"issue":"1","published-print":{"date-parts":[[2014,11,18]]}},"alternative-id":["10.1145\/2668119"],"URL":"https:\/\/doi.org\/10.1145\/2668119","relation":{},"ISSN":["1084-4309","1557-7309"],"issn-type":[{"type":"print","value":"1084-4309"},{"type":"electronic","value":"1557-7309"}],"subject":[],"published":{"date-parts":[[2014,11,18]]},"assertion":[{"value":"2013-10-01","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2014-09-01","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2014-11-18","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}