{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:13:31Z","timestamp":1750306411044,"version":"3.41.0"},"reference-count":36,"publisher":"Association for Computing Machinery (ACM)","issue":"2","license":[{"start":{"date-parts":[[2015,9,2]],"date-time":"2015-09-02T00:00:00Z","timestamp":1441152000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"name":"Center for Hierarchical Manufacturing (CHM) at UMass Amherst"},{"name":"Focus Center Research Program (FCRP) Center on Functionally Engineering Nano Architectonics"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["J. Emerg. Technol. Comput. Syst."],"published-print":{"date-parts":[[2015,9,2]]},"abstract":"<jats:p>\n            Graphene is an emerging nanomaterial believed to be a potential candidate for post-Si nanoelectronics due to its exotic properties. Recently, a new\n            <jats:italic>graphene nanoribbon crossbar<\/jats:italic>\n            (xGNR) device was proposed which exhibits\n            <jats:italic>negative differential resistance<\/jats:italic>\n            (NDR). In this article, a multistate memory design is presented that can store multiple bits in a single cell enabled by this xGNR device, called\n            <jats:italic>graphene nanoribbon tunneling random access memory<\/jats:italic>\n            (GNTRAM). An approach to increase the number of bits per cell is explored alternative to physical scaling to overcome CMOS SRAM limitations. A comprehensive design for quaternary GNTRAM is presented as a baseline, implemented with a heterogeneous integration between graphene and CMOS. Sources of leakage and approaches to mitigate them are investigated. This design is extensively benchmarked against 16nm CMOS SRAMs and 3T DRAM. The proposed quaternary cell shows up to 2.27\u00d7 density benefit versus 16nm CMOS SRAMs and 1.8\u00d7 versus 3T DRAM. It has comparable read performance and is power efficient up to 1.32\u00d7 during active period and 818\u00d7 during standby against high-performance SRAMs. Multistate GNTRAM has the potential to realize high-density low-power nanoscale embedded memories. Further improvements may be possible by using graphene more extensively, as graphene transistors become available in the future.\n          <\/jats:p>","DOI":"10.1145\/2700233","type":"journal-article","created":{"date-parts":[[2015,9,8]],"date-time":"2015-09-08T12:36:15Z","timestamp":1441715775000},"page":"1-18","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":2,"title":["Low-Power Heterogeneous Graphene Nanoribbon-CMOS Multistate Volatile Memory Circuit"],"prefix":"10.1145","volume":"12","author":[{"given":"Santosh","family":"Khasanvis","sequence":"first","affiliation":[{"name":"University of Massachusetts Amherst, Amherst, MA"}]},{"given":"K. M. Masum","family":"Habib","sequence":"additional","affiliation":[{"name":"University of California Riverside, Riverside, CA"}]},{"given":"Mostafizur","family":"Rahman","sequence":"additional","affiliation":[{"name":"University of Massachusetts Amherst, Amherst, MA"}]},{"given":"Roger","family":"Lake","sequence":"additional","affiliation":[{"name":"University of California Riverside, Riverside, CA"}]},{"given":"Csaba Andras","family":"Moritz","sequence":"additional","affiliation":[{"name":"University of Massachusetts Amherst, Amherst, MA"}]}],"member":"320","published-online":{"date-parts":[[2015,9,2]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.physe.2007.06.003"},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2008.2009362"},{"volume-title":"Proc. SPIE 7274","author":"Bencher C.","key":"e_1_2_1_3_1"},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2128150"},{"volume-title":"Proceedings of the IEEE International Electron Devices Meeting (IEDM'07)","author":"De Heer W. A.","key":"e_1_2_1_5_1"},{"volume-title":"Proceedings of the IEEE International Systems-on-Chip Conference (SoC'03)","author":"Elakkumanan P.","key":"e_1_2_1_6_1"},{"key":"e_1_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2008.2010629"},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2009.2028248"},{"key":"e_1_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/TEC.1960.5221600"},{"volume-title":"Proc. SPIE 7122","author":"Greenway R. T.","key":"e_1_2_1_10_1"},{"volume-title":"Proceedings of the IEEE International Electron Devices Meeting (IEDM'08)","year":"2008","author":"Guan X.","key":"e_1_2_1_11_1"},{"volume-title":"Proceedings of the 69th Annual Device Research Conference (DRC'11)","author":"Habib K. M. M.","key":"e_1_2_1_12_1"},{"key":"e_1_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevB.86.045418"},{"key":"e_1_2_1_14_1","first-page":"15","article-title":"Multi-state current switching by voltage controlled coupling of crossed graphene nanoribbons","volume":"114","author":"Habib K. M. M.","year":"2013","journal-title":"J. Appl. Phys."},{"key":"e_1_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2011.14"},{"volume-title":"Ultra-Low Voltage Nano-Scale Memories","author":"Itoh K.","key":"e_1_2_1_16_1","doi-asserted-by":"crossref","DOI":"10.1007\/978-0-387-68853-4"},{"key":"e_1_2_1_17_1","unstructured":"Itrs. 2015. The international technology roadmap for semiconductors. http:\/\/www.itrs.net\/.  Itrs. 2015. The international technology roadmap for semiconductors. http:\/\/www.itrs.net\/."},{"key":"e_1_2_1_18_1","doi-asserted-by":"crossref","unstructured":"N. K. Jha and D. Chen Eds. 2011. Nanoelectronic Circuit Design. Springer.  N. K. Jha and D. Chen Eds. 2011. Nanoelectronic Circuit Design. Springer.","DOI":"10.1007\/978-1-4419-7609-3"},{"key":"e_1_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICIPRM.1992.235557"},{"key":"e_1_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1109\/NANOARCH.2011.5941503"},{"key":"e_1_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1145\/2765491.2765505"},{"volume-title":"Proceedings of the IEEE International Electron Devices Meeting (IEDM'09)","author":"Lam K.-T.","key":"e_1_2_1_22_1"},{"key":"e_1_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1063\/1.3243695"},{"key":"e_1_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISMVL.1994.302201"},{"key":"e_1_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2010.2043639"},{"key":"e_1_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1109\/5.663544"},{"key":"e_1_2_1_27_1","unstructured":"T. H. Morshed D. D. Lu W. Yang M. V. Dunga X. Xi J. He W. Liu K. M. Cao X. Jin J. J. Ou M. Chan A. M. Niknejad and C. Hu. 2011. BSIM4v4.7 MOSFET model -- User's manual. http:\/\/www-device.eecs.berkeley.edu\/bsim\/Files\/BSIM4\/BSIM470\/BSIM470_Manual.pdf.  T. H. Morshed D. D. Lu W. Yang M. V. Dunga X. Xi J. He W. Liu K. M. Cao X. Jin J. J. Ou M. Chan A. M. Niknejad and C. Hu. 2011. BSIM4v4.7 MOSFET model -- User's manual. http:\/\/www-device.eecs.berkeley.edu\/bsim\/Files\/BSIM4\/BSIM470\/BSIM470_Manual.pdf."},{"key":"e_1_2_1_28_1","doi-asserted-by":"crossref","unstructured":"K. S. Novoselov A. K. Geim S. V. Morozov D. Jiang M. I. Katsnelson I. V. Grigorieva S. V. Dubonos and A. A. Firsov. 2005. Two-dimensional gas of massless dirac fermions in grapheme. Nature 438 7065 197--200.  K. S. Novoselov A. K. Geim S. V. Morozov D. Jiang M. I. Katsnelson I. V. Grigorieva S. V. Dubonos and A. A. Firsov. 2005. Two-dimensional gas of massless dirac fermions in grapheme. Nature 438 7065 197--200.","DOI":"10.1038\/nature04233"},{"key":"e_1_2_1_29_1","unstructured":"Predictive Technology Model. 2015. http:\/\/ptm.asu.edu\/.  Predictive Technology Model. 2015. http:\/\/ptm.asu.edu\/."},{"key":"e_1_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2010.115"},{"volume-title":"Proceedings of the 11th IEEE Conference on Nanotechnology (IEEE-NANO'11)","author":"Rahman M.","key":"e_1_2_1_31_1"},{"key":"e_1_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.1038\/nnano.2010.89"},{"key":"e_1_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1109\/MSSC.2011.2177577"},{"key":"e_1_2_1_34_1","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2010.2060348"},{"key":"e_1_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.1109\/5.752516"},{"volume-title":"Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS'91)","author":"Wei S.-J.","key":"e_1_2_1_36_1"}],"container-title":["ACM Journal on Emerging Technologies in Computing Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2700233","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2700233","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T05:07:43Z","timestamp":1750223263000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2700233"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,9,2]]},"references-count":36,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2015,9,2]]}},"alternative-id":["10.1145\/2700233"],"URL":"https:\/\/doi.org\/10.1145\/2700233","relation":{},"ISSN":["1550-4832","1550-4840"],"issn-type":[{"type":"print","value":"1550-4832"},{"type":"electronic","value":"1550-4840"}],"subject":[],"published":{"date-parts":[[2015,9,2]]},"assertion":[{"value":"2013-12-01","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2014-09-01","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2015-09-02","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}