{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:17:42Z","timestamp":1750306662459,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":6,"publisher":"ACM","license":[{"start":{"date-parts":[[2015,5,20]],"date-time":"2015-05-20T00:00:00Z","timestamp":1432080000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/100000185","name":"Defense Advanced Research Projects Agency","doi-asserted-by":"publisher","award":["HR0011-13-2-0014"],"award-info":[{"award-number":["HR0011-13-2-0014"]}],"id":[{"id":"10.13039\/100000185","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2015,5,20]]},"DOI":"10.1145\/2742060.2742106","type":"proceedings-article","created":{"date-parts":[[2015,5,19]],"date-time":"2015-05-19T13:49:03Z","timestamp":1432043343000},"page":"103-106","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":1,"title":["The Bit-Nibble-Byte MicroEngine (BnB) for Efficient Computing on Short Data"],"prefix":"10.1145","author":[{"given":"Dilip","family":"Vasudevan","sequence":"first","affiliation":[{"name":"University of Chicago, Chicago, IL, USA"}]},{"given":"Andrew A.","family":"Chien","sequence":"additional","affiliation":[{"name":"University of Chicago, Chicago, IL, USA"}]}],"member":"320","published-online":{"date-parts":[[2015,5,20]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.procs.2011.04.217"},{"key":"e_1_3_2_1_2_1","volume-title":"DATE","author":"Chen K.","year":"2012","unstructured":"K. Chen : Architecture-level modeling for 3d die-stacked dram main memory . In DATE , March 2012 . K. Chen et al. Cacti-3dd: Architecture-level modeling for 3d die-stacked dram main memory. In DATE, March 2012."},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2012.6242474"},{"volume-title":"Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2012","year":"2012","key":"e_1_3_2_1_4_1","unstructured":"Kim : 3d massively parallel processor with stacked memory . In Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2012 IEEE International, pages 188- -190, Feb 2012 . Kim et al. 3d-maps: 3d massively parallel processor with stacked memory. In Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2012 IEEE International, pages 188--190, Feb 2012."},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/2024724.2024954"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/L-CA.2011.4"}],"event":{"name":"GLSVLSI '15: Great Lakes Symposium on VLSI 2015","sponsor":["SIGDA ACM Special Interest Group on Design Automation","IEEE CEDA","IEEE CASS"],"location":"Pittsburgh Pennsylvania USA","acronym":"GLSVLSI '15"},"container-title":["Proceedings of the 25th edition on Great Lakes Symposium on VLSI"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2742060.2742106","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2742060.2742106","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T07:00:32Z","timestamp":1750230032000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2742060.2742106"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,5,20]]},"references-count":6,"alternative-id":["10.1145\/2742060.2742106","10.1145\/2742060"],"URL":"https:\/\/doi.org\/10.1145\/2742060.2742106","relation":{},"subject":[],"published":{"date-parts":[[2015,5,20]]},"assertion":[{"value":"2015-05-20","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}