{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,7]],"date-time":"2026-04-07T21:54:25Z","timestamp":1775598865488,"version":"3.50.1"},"publisher-location":"New York, NY, USA","reference-count":29,"publisher":"ACM","license":[{"start":{"date-parts":[[2015,5,20]],"date-time":"2015-05-20T00:00:00Z","timestamp":1432080000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2015,5,20]]},"DOI":"10.1145\/2742060.2743760","type":"proceedings-article","created":{"date-parts":[[2015,5,19]],"date-time":"2015-05-19T13:49:03Z","timestamp":1432043343000},"page":"343-348","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":144,"title":["A Comparative Review and Evaluation of Approximate Adders"],"prefix":"10.1145","author":[{"given":"Honglan","family":"Jiang","sequence":"first","affiliation":[{"name":"University of Alberta, Edmonton, AB, Canada"}]},{"given":"Jie","family":"Han","sequence":"additional","affiliation":[{"name":"University of Alberta, Edmonton, AB, Canada"}]},{"given":"Fabrizio","family":"Lombardi","sequence":"additional","affiliation":[{"name":"Northeastern University, Boston, MA, USA"}]}],"member":"320","published-online":{"date-parts":[[2015,5,20]]},"reference":[{"key":"e_1_3_2_1_1_1","first-page":"1257","volume-title":"DATE","author":"Du K.","year":"2012","unstructured":"K. Du , P. Varman , and K. Mohanram . High performance reliable variable latency carry select addition . In DATE , pages 1257 -- 1262 , 2012 . K. Du, P. Varman, and K. Mohanram. High performance reliable variable latency carry select addition. In DATE, pages 1257--1262, 2012."},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2217962"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/ETS.2013.6569370"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/92.974895"},{"key":"e_1_3_2_1_5_1","volume-title":"DATE, in press","author":"Hu J.","year":"2015","unstructured":"J. Hu and W. Qian . A new approximate adder with low relative error and correct sign calculation . In DATE, in press , 2015 . J. Hu and W. Qian. A new approximate adder with low relative error and correct sign calculation. In DATE, in press, 2015."},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228450"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228509"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.5555\/2561828.2561854"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.5555\/515982"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.5555\/2691365.2691468"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2012.146"},{"key":"e_1_3_2_1_12_1","article-title":"High-performance low-power carry speculative addition with varible latency","author":"Lin I.","year":"2014","unstructured":"I. Lin , Y. Yang , and C. Lin . High-performance low-power carry speculative addition with varible latency . IEEE Trans. VLSI Syst., in press , 2014 . I. Lin, Y. Yang, and C. Lin. High-performance low-power carry speculative addition with varible latency. IEEE Trans. VLSI Syst., in press, 2014.","journal-title":"IEEE Trans. VLSI Syst., in press"},{"key":"e_1_3_2_1_13_1","article-title":"An analytical framework for evaluating the error characteristics of approximate adders","author":"Liu C.","year":"2014","unstructured":"C. Liu , J. Han , and F. Lombardi . An analytical framework for evaluating the error characteristics of approximate adders . IEEE Trans. Comput. , 2014 . C. Liu, J. Han, and F. Lombardi. An analytical framework for evaluating the error characteristics of approximate adders. IEEE Trans. Comput., 2014.","journal-title":"IEEE Trans. Comput."},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/NANO.2014.6967953"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2009.2012863"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2004.1274006"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2009.2027626"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/2429384.2429542"},{"key":"e_1_3_2_1_19_1","first-page":"1","volume-title":"DATE","author":"Mohapatra D.","year":"2011","unstructured":"D. Mohapatra , V. Chippa , A. Raghunathan , and K. Roy . Design of voltage-scalable meta-functions for approximate computing . In DATE , pages 1 -- 6 , 2011 . D. Mohapatra, V. Chippa, A. Raghunathan, and K. Roy. Design of voltage-scalable meta-functions for approximate computing. In DATE, pages 1--6, 2011."},{"issue":"4","key":"e_1_3_2_1_20_1","first-page":"362","article-title":"Approximate adder design using cpl logic for image compression","volume":"3","author":"Nanu D.","year":"2014","unstructured":"D. Nanu , R. P. K., D. Sowkarthiga , and K. S. A. Ameen . Approximate adder design using cpl logic for image compression . International Journal of Innovative Research and Development , 3 ( 4 ): 362 -- 370 , 2014 . D. Nanu, R. P. K., D. Sowkarthiga, and K. S. A. Ameen. Approximate adder design using cpl logic for image compression. International Journal of Innovative Research and Development, 3(4):362--370, 2014.","journal-title":"International Journal of Innovative Research and Development"},{"key":"e_1_3_2_1_21_1","volume-title":"Computer Arithmetic: Algorithms and Hardware Designs","author":"Parhami B.","year":"2010","unstructured":"B. Parhami . Computer Arithmetic: Algorithms and Hardware Designs , 2 nd edition. Oxford University Press , New York , 2010 . B. Parhami. Computer Arithmetic: Algorithms and Hardware Designs, 2nd edition. Oxford University Press, New York, 2010.","edition":"2"},{"key":"e_1_3_2_1_22_1","first-page":"667","volume-title":"ICCAD","author":"Venkatesan R.","year":"2010","unstructured":"R. Venkatesan , A. Agarwal , K. Roy , and A. Raghunathan . Macaco: Modeling and analysis of circuits for approximate computing . In ICCAD , pages 667 -- 673 , 2010 . R. Venkatesan, A. Agarwal, K. Roy, and A. Raghunathan. Macaco: Modeling and analysis of circuits for approximate computing. In ICCAD, pages 667--673, 2010."},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1145\/1403375.1403679"},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1109\/NANO.2013.6720793"},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.5555\/2561828.2561838"},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1109\/SOCDC.2010.5682905"},{"key":"e_1_3_2_1_27_1","first-page":"69","volume-title":"ISIC 2009","author":"Zhu N.","year":"2009","unstructured":"N. Zhu , W. L. Goh , and K. S. Yeo . An enhanced low-power high-speed adder for error-tolerant application . In ISIC 2009 , pages 69 -- 72 , 2009 . N. Zhu, W. L. Goh, and K. S. Yeo. An enhanced low-power high-speed adder for error-tolerant application. In ISIC 2009, pages 69--72, 2009."},{"key":"e_1_3_2_1_28_1","first-page":"393","volume-title":"SOCC","author":"Zhu N.","year":"2011","unstructured":"N. Zhu , W. L. Goh , and K. S. Yeo . Ultra low-power high-speed exible Probabilistic Adder for Error-Tolerant Applications . In SOCC , pages 393 -- 396 , 2011 . N. Zhu, W. L. Goh, and K. S. Yeo. Ultra low-power high-speed exible Probabilistic Adder for Error-Tolerant Applications. In SOCC, pages 393--396, 2011."},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2009.2020591"}],"event":{"name":"GLSVLSI '15: Great Lakes Symposium on VLSI 2015","location":"Pittsburgh Pennsylvania USA","acronym":"GLSVLSI '15","sponsor":["SIGDA ACM Special Interest Group on Design Automation","IEEE CEDA","IEEE CASS"]},"container-title":["Proceedings of the 25th edition on Great Lakes Symposium on VLSI"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2742060.2743760","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2742060.2743760","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T07:00:32Z","timestamp":1750230032000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2742060.2743760"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,5,20]]},"references-count":29,"alternative-id":["10.1145\/2742060.2743760","10.1145\/2742060"],"URL":"https:\/\/doi.org\/10.1145\/2742060.2743760","relation":{},"subject":[],"published":{"date-parts":[[2015,5,20]]},"assertion":[{"value":"2015-05-20","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}