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We investigate\n            <jats:italic>array interleaving<\/jats:italic>\n            , a data layout transformation technique that achieves energy efficiency by combining the storage of data elements from multiple arrays in contiguous locations, in an attempt to exploit spatial locality. The transformation reduces the number of memory accesses by loading the right set of data into vector registers, thereby minimizing redundant memory fetches. We perform a global analysis of array accesses, and account for possibly different array behavior in different loop nests that might ultimately lead to changes in data layout decisions for the same array across program regions. Our technique relies on detailed estimates of the savings due to interleaving, and also the cost of performing the actual data layout modifications. We also account for the vector register widths and the possibility of choosing the appropriate granularity for interleaving. Experiments on several benchmarks show a 6--34% reduction in memory energy due to the strategy.\n          <\/jats:p>","DOI":"10.1145\/2747875","type":"journal-article","created":{"date-parts":[[2015,6,25]],"date-time":"2015-06-25T14:36:19Z","timestamp":1435242979000},"page":"1-26","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":7,"title":["Array Interleaving\u2014An Energy-Efficient Data Layout Transformation"],"prefix":"10.1145","volume":"20","author":[{"given":"Namita","family":"Sharma","sequence":"first","affiliation":[{"name":"Indian Institute of Technology Delhi"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Preeti Ranjan","family":"Panda","sequence":"additional","affiliation":[{"name":"Indian Institute of Technology Delhi"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Francky","family":"Catthoor","sequence":"additional","affiliation":[{"name":"Interuniversity Microelectronics Centre and K.U. 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