{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,4]],"date-time":"2025-10-04T08:14:37Z","timestamp":1759565677450,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":23,"publisher":"ACM","license":[{"start":{"date-parts":[[2012,7,4]],"date-time":"2012-07-04T00:00:00Z","timestamp":1341360000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"name":"French National Research Agency"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2012,7,4]]},"DOI":"10.1145\/2765491.2765494","type":"proceedings-article","created":{"date-parts":[[2015,4,22]],"date-time":"2015-04-22T15:50:56Z","timestamp":1429717856000},"page":"7-13","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":3,"title":["Ambipolar double gate CNTFETs based reconfigurable logic cells"],"prefix":"10.1145","author":[{"given":"Kotb","family":"Jabeur","sequence":"first","affiliation":[{"name":"Lyon Institute of Nanotechnology -- Ecole Centrale de Lyon, Ecully, France"}]},{"given":"Ian","family":"O'Connor","sequence":"additional","affiliation":[{"name":"Lyon Institute of Nanotechnology -- Ecole Centrale de Lyon, Ecully, France"}]},{"given":"S\u00e9bastien","family":"Le Beux","sequence":"additional","affiliation":[{"name":"Lyon Institute of Nanotechnology -- Ecole Centrale de Lyon, Ecully, France"}]},{"given":"David","family":"Navarro","sequence":"additional","affiliation":[{"name":"Lyon Institute of Nanotechnology -- Ecole Centrale de Lyon, Ecully, France"}]}],"member":"320","published-online":{"date-parts":[[2012,7,4]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.3390\/jlpea1020277"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.5555\/1978003.1978171"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2007.912024"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1149\/1.3567706"},{"key":"e_1_3_2_1_5_1","volume-title":"Double-Gate MOSFET Based Reconfigurable Cells. El. Lett. 43, 23 (Nov","author":"I.","year":"2007","unstructured":"Hassoune, I., O'Connor, I. 2007. Double-Gate MOSFET Based Reconfigurable Cells. El. Lett. 43, 23 (Nov . 2007 ), 1273--1274. Hassoune, I., O'Connor, I. 2007. Double-Gate MOSFET Based Reconfigurable Cells. El. Lett. 43, 23 (Nov. 2007), 1273--1274."},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/NANOARCH.2011.5941499"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/1973009.1973014"},{"key":"e_1_3_2_1_8_1","first-page":"853","volume-title":"Proc. 14th Asia and South Pacific Design Automation Conference (ASP-DAC)","author":"Liu B.","year":"2009","unstructured":"B. Liu , \" Reconfigurable Double Gate Carbon Nanotube Field Effect Transistor Based Nanoelectronic Architecture\" , Proc. 14th Asia and South Pacific Design Automation Conference (ASP-DAC) , pp. 853 -- 858 , Yokohama, Japan, 19- -22 January 2009 B. Liu, \"Reconfigurable Double Gate Carbon Nanotube Field Effect Transistor Based Nanoelectronic Architecture\", Proc. 14th Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 853--858, Yokohama, Japan, 19--22 January 2009"},{"key":"e_1_3_2_1_9_1","first-page":"17","volume-title":"Proc. 53rd IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)","author":"Liu B.","year":"2010","unstructured":"B. Liu , \" Advancements on Crossbar-Based Nanoscale Reconfigurable Computing Platforms\" , Proc. 53rd IEEE International Midwest Symposium on Circuits and Systems (MWSCAS) , pp. 17 -- 20 , Seattle (WA), USA, 1- -4 August 2010 B. Liu, \"Advancements on Crossbar-Based Nanoscale Reconfigurable Computing Platforms\", Proc. 53rd IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), pp. 17--20, Seattle (WA), USA, 1--4 August 2010"},{"key":"e_1_3_2_1_10_1","first-page":"65","volume-title":"Proc. IEEE\/ACM Intl. Symp. Nanoscale Architectures (NANOARCH)","author":"Marchi M. De","year":"2010","unstructured":"M. De Marchi , M. H. Ben Jamaa , G. De Micheli , \" Regular Fabric Design with AmbipolarCNFETs for FPGA and Structured ASIC Applications\" , Proc. IEEE\/ACM Intl. Symp. Nanoscale Architectures (NANOARCH) , pp. 65 -- 70 , Anaheim (CA), USA, 17- -18 June 2010 M. De Marchi, M. H. Ben Jamaa, G. De Micheli, \"Regular Fabric Design with AmbipolarCNFETs for FPGA and Structured ASIC Applications\", Proc. IEEE\/ACM Intl. Symp. Nanoscale Architectures (NANOARCH), pp. 65--70, Anaheim (CA), USA, 17--18 June 2010"},{"volume-title":"DAC 2008","author":"M. H.","key":"e_1_3_2_1_11_1","unstructured":"M. H. B. Jamaa et al, \"Programmable logic circuits based on ambipolar CNFET \", DAC 2008 M. H. B. Jamaa et al, \"Programmable logic circuits based on ambipolar CNFET\", DAC 2008"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"crossref","unstructured":"O'Connor I. Liu J. Navarro D. Daviot R. Abouchi N. Gaillardon P.-E. Clermidy F. 2010. Molecular electronics and reconfigurable logic. Int. J. Nanotechn. 7 4\/5\/6\/7\/8 367--382.  O'Connor I. Liu J. Navarro D. Daviot R. Abouchi N. Gaillardon P.-E. Clermidy F. 2010. Molecular electronics and reconfigurable logic. Int. J. Nanotechn. 7 4\/5\/6\/7\/8 367--382.","DOI":"10.1504\/IJNT.2010.031725"},{"key":"e_1_3_2_1_13_1","first-page":"11","article-title":"2007","volume":"54","year":"2007","unstructured":"O'Connor, I., 2007 . CNTFET Modeling and Reconfigurable Logic-Circuit Design. IEEE Trans. Circuits and Systems-I: Regular Papers. 54 , 11 ( Nov. 2007 ), 2365--2379. O'Connor, I., et al. 2007. CNTFET Modeling and Reconfigurable Logic-Circuit Design. IEEE Trans. Circuits and Systems-I: Regular Papers. 54, 11 (Nov. 2007), 2365--2379.","journal-title":"CNTFET Modeling and Reconfigurable Logic-Circuit Design. IEEE Trans. Circuits and Systems-I: Regular Papers."},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2010.2082548"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2011.2174410"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1021\/nl803496s"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1021\/nl049222b"},{"key":"e_1_3_2_1_19_1","volume-title":"Design, Automation and Test in Europe (DATE).","author":"Ben Jamaa M. H.","year":"2009","unstructured":"M. H. Ben Jamaa , \" Novel Library of Logic Gates with Ambipolar CNTFETs: Opportunities for Multi-Level Logic Synthesis \", Design, Automation and Test in Europe (DATE). March 2009 . M. H. Ben Jamaa et al, \"Novel Library of Logic Gates with Ambipolar CNTFETs: Opportunities for Multi-Level Logic Synthesis\", Design, Automation and Test in Europe (DATE). March 2009."},{"volume-title":"Th\u00e8se ECL","author":"el Gaillardon Pierre","key":"e_1_3_2_1_20_1","unstructured":"Pierre emmanu el Gaillardon , \" Reconfigurable Logic Architectures based on Disruptive Technologies\" , Th\u00e8se ECL , Dir : Ian O'Connor . http:\/\/bibli.ec-lyon.fr\/exl-doc\/TH_T2224_pgaillardon.pdf Pierre emmanuel Gaillardon, \"Reconfigurable Logic Architectures based on Disruptive Technologies\", Th\u00e8se ECL, Dir: Ian O'Connor. http:\/\/bibli.ec-lyon.fr\/exl-doc\/TH_T2224_pgaillardon.pdf"},{"key":"e_1_3_2_1_21_1","first-page":"1","volume-title":"Int. Conf. DTISNanoscale Era","author":"J. Goguet","year":"2008","unstructured":"J. Goguet et al, \"A charge approach for a compact model of dual gate CNTFET\" in Proc . Int. Conf. DTISNanoscale Era , 2008 , pp. 1 -- 5 . J. Goguet et al, \"A charge approach for a compact model of dual gate CNTFET\" in Proc. Int. Conf. DTISNanoscale Era, 2008, pp. 1--5."},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2005.851427"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1021\/nl035185x"},{"key":"e_1_3_2_1_24_1","unstructured":"http:\/\/ptm.asu.edu\/modelcard\/LP\/16nm_LP.pm  http:\/\/ptm.asu.edu\/modelcard\/LP\/16nm_LP.pm"}],"event":{"name":"NANOARCH '12: IEEE\/ACM International Symposium on Nanoscale Architectures","sponsor":["ACM Association for Computing Machinery","SIGDA ACM Special Interest Group on Design Automation","IEEE CS"],"location":"Amsterdam The Netherlands","acronym":"NANOARCH '12"},"container-title":["Proceedings of the 2012 IEEE\/ACM International Symposium on Nanoscale Architectures"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2765491.2765494","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2765491.2765494","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T06:12:24Z","timestamp":1750227144000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2765491.2765494"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,7,4]]},"references-count":23,"alternative-id":["10.1145\/2765491.2765494","10.1145\/2765491"],"URL":"https:\/\/doi.org\/10.1145\/2765491.2765494","relation":{},"subject":[],"published":{"date-parts":[[2012,7,4]]},"assertion":[{"value":"2012-07-04","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}