{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:14:10Z","timestamp":1750306450441,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":15,"publisher":"ACM","license":[{"start":{"date-parts":[[2015,9,28]],"date-time":"2015-09-28T00:00:00Z","timestamp":1443398400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2015,9,28]]},"DOI":"10.1145\/2786572.2786583","type":"proceedings-article","created":{"date-parts":[[2015,8,26]],"date-time":"2015-08-26T16:48:13Z","timestamp":1440607693000},"page":"1-8","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":1,"title":["On-Chip Decentralized Routers with Balanced Pipelines for Avoiding Interconnect Bottleneck"],"prefix":"10.1145","author":[{"given":"Ryota","family":"Yasudo","sequence":"first","affiliation":[{"name":"Keio University, Yokohama, Japan 223--8552"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hiroki","family":"Matsutani","sequence":"additional","affiliation":[{"name":"Keio University, Yokohama, Japan 223--8552"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Michihiro","family":"Koibuchi","sequence":"additional","affiliation":[{"name":"National Institute of Informatics, Tokyo, Japan 101--8430"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hideharu","family":"Amano","sequence":"additional","affiliation":[{"name":"Keio University, Yokohama, Japan 223--8552"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Tadao","family":"Nakamura","sequence":"additional","affiliation":[{"name":"Keio University, Yokohama, Japan 223--8552"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2015,9,28]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/1250662.1250678"},{"key":"e_1_3_2_1_2_1","volume-title":"Proc. of the Int'l Symp. on Networks-on-Chip","author":"Anders M.","year":"2014","unstructured":"M. Anders . High-performance energy-efficient NoC fabrics . In Proc. of the Int'l Symp. on Networks-on-Chip , Sept. 2014 . M. Anders. High-performance energy-efficient NoC fabrics. In Proc. of the Int'l Symp. on Networks-on-Chip, Sept. 2014."},{"key":"e_1_3_2_1_3_1","volume-title":"Morgan Kaufmann","author":"Duato J.","year":"2003","unstructured":"J. Duato , S. Yalamanchilli , and L. M. Ni . Interconnection networks: An engineering approach . Morgan Kaufmann , 2003 . J. Duato, S. Yalamanchilli, and L. M. Ni. Interconnection networks: An engineering approach. Morgan Kaufmann, 2003."},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/139669.140384"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2007.89"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/5.920580"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.5555\/1397757.1397999"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2007.15"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/1654059.1654062"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2006.878263"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.sysarc.2013.03.008"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/NOCS.2014.7008772"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2002.997877"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/NOCS.2014.7008769"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1109\/NoCS.2013.6558415"}],"event":{"name":"NOCS '15: International Symposium on Networks-on-Chip","sponsor":["SIGBED ACM Special Interest Group on Embedded Systems","SIGDA ACM Special Interest Group on Design Automation","IEEE CAS","IEEE CEDA","SIGARCH ACM Special Interest Group on Computer Architecture"],"location":"Vancouver BC Canada","acronym":"NOCS '15"},"container-title":["Proceedings of the 9th International Symposium on Networks-on-Chip"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2786572.2786583","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2786572.2786583","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T05:43:08Z","timestamp":1750225388000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2786572.2786583"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,9,28]]},"references-count":15,"alternative-id":["10.1145\/2786572.2786583","10.1145\/2786572"],"URL":"https:\/\/doi.org\/10.1145\/2786572.2786583","relation":{},"subject":[],"published":{"date-parts":[[2015,9,28]]},"assertion":[{"value":"2015-09-28","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}