{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:14:06Z","timestamp":1750306446291,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":22,"publisher":"ACM","license":[{"start":{"date-parts":[[2015,8,31]],"date-time":"2015-08-31T00:00:00Z","timestamp":1440979200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2015,8,31]]},"DOI":"10.1145\/2800986.2800987","type":"proceedings-article","created":{"date-parts":[[2015,10,30]],"date-time":"2015-10-30T15:27:07Z","timestamp":1446218827000},"page":"1-6","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":5,"title":["0.5 V Supply Resistorless Voltage Reference for Low Voltage Applications"],"prefix":"10.1145","author":[{"given":"Renato V.","family":"Campana","sequence":"first","affiliation":[{"name":"PGMicro - Graduate Program on Microlectronics, Federal Univ. of Rio Grande, do Sul., Porto Alegre, Brazil"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hamilton","family":"Klimach","sequence":"additional","affiliation":[{"name":"PGMicro - Electrical, Engineering Department, Federal Univ. of Rio Grande, do Sul, Porto Alegre, Brazil"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sergio","family":"Bampi","sequence":"additional","affiliation":[{"name":"PGMicro - Informatics Institute, Federal Univ. of Rio Grande, do Sul, Porto Alegre, Brazil"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2015,8,31]]},"reference":[{"doi-asserted-by":"publisher","key":"e_1_3_2_1_1_1","DOI":"10.1145\/2020876.2020887"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_2_1","DOI":"10.1145\/1854153.1854166"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_3_1","DOI":"10.1109\/JSSC.1971.1050151"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_4_1","DOI":"10.1109\/CICC.2008.4672187"},{"unstructured":"International Technology Roadmap for Semiconductors (ITRS). Avalible: http:\/\/www.itrs.net.  International Technology Roadmap for Semiconductors (ITRS). Avalible: http:\/\/www.itrs.net.","key":"e_1_3_2_1_5_1"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_6_1","DOI":"10.1007\/s10470-014-0343-8"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"crossref","DOI":"10.1007\/978-0-387-69954-7","volume-title":"Analog Circuit Design Techniques at 0.5 V","author":"Chatterjee S.","year":"2007","unstructured":"S. Chatterjee , K. Pang Pun , N. Stanic , Y. Tsividis , and P. Kinget . Analog Circuit Design Techniques at 0.5 V . Springer US , 1 st edition, 2007 . S. Chatterjee, K. Pang Pun, N. Stanic, Y. Tsividis, and P. Kinget. Analog Circuit Design Techniques at 0.5 V. Springer US, 1st edition, 2007.","edition":"1"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_8_1","DOI":"10.1109\/TCSI.2015.2399027"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_9_1","DOI":"10.1109\/NEWCAS.2014.6934080"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_10_1","DOI":"10.1109\/LASCAS.2014.6820263"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_11_1","DOI":"10.1109\/TCSI.2013.2278344"},{"key":"e_1_3_2_1_12_1","first-page":"1","volume-title":"Technology and Applications (EAMTA)","author":"Galup-Montoro C.","year":"2013","unstructured":"C. Galup-Montoro , M. C. Schneider , L. G. de Carli , and M. B. Machado . Introductory ultra-low-voltage electronics. In 2013 7th Argentine School of Micro-Nanoelectronics , Technology and Applications (EAMTA) , pages 1 -- 8 , Aug 2013 . C. Galup-Montoro, M. C. Schneider, L. G. de Carli, and M. B. Machado. Introductory ultra-low-voltage electronics. In 2013 7th Argentine School of Micro-Nanoelectronics, Technology and Applications (EAMTA), pages 1--8, Aug 2013."},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_13_1","DOI":"10.1109\/TCSII.2014.2350354"},{"key":"e_1_3_2_1_14_1","first-page":"41","volume-title":"Proceedings of the 2004 International Symposium on Circuits and Systems, 2004. ISCAS '04.","volume":"1","author":"Ker Ming-Dou","unstructured":"Ming-Dou Ker , Jung-Sheng Chen , and Ching-Yun Chu . A cmos bandgap reference circuit for sub-1-V operation without using extra low-threshold-voltage device . In Proceedings of the 2004 International Symposium on Circuits and Systems, 2004. ISCAS '04. , volume 1 , pages I-- 41 --I--44 Vol.1, May 2004. Ming-Dou Ker, Jung-Sheng Chen, and Ching-Yun Chu. A cmos bandgap reference circuit for sub-1-V operation without using extra low-threshold-voltage device. In Proceedings of the 2004 International Symposium on Circuits and Systems, 2004. ISCAS '04., volume 1, pages I--41--I--44 Vol.1, May 2004."},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_15_1","DOI":"10.1109\/4.760378"},{"key":"e_1_3_2_1_16_1","first-page":"635","volume-title":"Proceedings of the IEEE 2004 Custom Integrated Circuits Conference.","author":"P. K.","year":"2004","unstructured":"P. K. T. Mok and Ka Nang Leung. Design considerations of recent advanced low-voltage low-temperature-coefficient CMOS bandgap voltage reference . In Proceedings of the IEEE 2004 Custom Integrated Circuits Conference. , pages 635 -- 642 , Oct 2004 . P. K. T. Mok and Ka Nang Leung. Design considerations of recent advanced low-voltage low-temperature-coefficient CMOS bandgap voltage reference. In Proceedings of the IEEE 2004 Custom Integrated Circuits Conference., pages 635--642, Oct 2004."},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_17_1","DOI":"10.1109\/4.991391"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_18_1","DOI":"10.1109\/JSSC.2012.2191192"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_19_1","DOI":"10.1109\/SOCDC.2009.5423852"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_20_1","DOI":"10.1007\/s10470-015-0582-3"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_21_1","DOI":"10.1109\/TCSII.2014.2345298"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"crossref","DOI":"10.1017\/CBO9780511803840","volume-title":"CMOS Analog Design Using All-Region MOSFET Modeling","author":"Schneider M. C.","year":"2010","unstructured":"M. C. Schneider and C. Galup-Montoro . CMOS Analog Design Using All-Region MOSFET Modeling . Cambridge University Press , New York, NY, USA , 1 st edition, 2010 . M. C. Schneider and C. Galup-Montoro. CMOS Analog Design Using All-Region MOSFET Modeling. Cambridge University Press, New York, NY, USA, 1st edition, 2010.","edition":"1"}],"event":{"sponsor":["SBC Brazilian Computer Society","SIGDA ACM Special Interest Group on Design Automation","SBMICRO Brazilian Microelectronics Society"],"acronym":"SBCCI '15","name":"SBCCI '15: 28th Symposium on Integrated Circuits and Systems Design","location":"Salvador Brazil"},"container-title":["Proceedings of the 28th Symposium on Integrated Circuits and Systems Design"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2800986.2800987","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2800986.2800987","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T05:42:58Z","timestamp":1750225378000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2800986.2800987"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,8,31]]},"references-count":22,"alternative-id":["10.1145\/2800986.2800987","10.1145\/2800986"],"URL":"https:\/\/doi.org\/10.1145\/2800986.2800987","relation":{},"subject":[],"published":{"date-parts":[[2015,8,31]]},"assertion":[{"value":"2015-08-31","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}