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Simul."],"published-print":{"date-parts":[[2016,1,29]]},"abstract":"<jats:p>Recent computing architectures are implemented by shared memory technologies to alleviate the high latency experienced by off-chip memory transfers, but the high architectural complexity of modern multicore processors has presented many questions. To tackle the design of efficient algorithms scheduling workloads over available cores, this article presents a parallel bioinspired model that simulates the utilization of shared memory on multicore systems. The proposed model is based on cellular automata (CA) and coupled with game theory principles. CA are selected due to their inherent parallelism and especially their ability to incorporate inhomogeneities. Furthermore, the novelty of the model is realized on the fact that multilevel CA are used to simulate the different levels of cache memory usually found in multicore processors. These characteristics make the model able to cope with the increasing diversity of cache memory hierarchies on modern and future processors. Nonetheless, by acquiring data from hardware performance counters and processing them with the proposed model online, the performance of the system can be calculated and a better scheduling strategy can be adopted in real time. The CA-based model was verified on the behavior of a real multicore system running a multithreaded application, and it successfully simulated the acceleration achieved by an increased number of cores available for the execution of the workload. More specifically, the example of common pool resource from game theory was used with two variations: a static and a variable initial endowment. The static variation of the model approximates slightly better the acceleration of a workload when the number of available processor cores increases, whereas the dynamic variation simulates better the moderate differences due to operation system\u2019s scheduler alternations on the same amount of cores.<\/jats:p>","DOI":"10.1145\/2812808","type":"journal-article","created":{"date-parts":[[2016,1,11]],"date-time":"2016-01-11T13:40:51Z","timestamp":1452519651000},"page":"1-22","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":4,"title":["Modeling Cache Memory Utilization on Multicore Using Common Pool Resource Game on Cellular Automata"],"prefix":"10.1145","volume":"26","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-6607-7831","authenticated-orcid":false,"given":"Michail-Antisthenis I.","family":"Tsompanas","sequence":"first","affiliation":[{"name":"Democritus University of Thrace"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Christoforos","family":"Kachris","sequence":"additional","affiliation":[{"name":"Democritus University of Thrace"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Georgios Ch.","family":"Sirakoulis","sequence":"additional","affiliation":[{"name":"Democritus University of Thrace"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2016,1,9]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/342001.339691"},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.parco.2012.11.003"},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.cageo.2005.10.026"},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1142\/S0219525905000403"},{"key":"e_1_2_1_5_1","series-title":"Lecture Notes in Computer Science","volume-title":"Parallel Computing Technologies","author":"Bandman Olga","unstructured":"Olga Bandman . 2011. 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