{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,31]],"date-time":"2026-03-31T10:21:14Z","timestamp":1774952474287,"version":"3.50.1"},"reference-count":75,"publisher":"Association for Computing Machinery (ACM)","issue":"4","license":[{"start":{"date-parts":[[2016,12,28]],"date-time":"2016-12-28T00:00:00Z","timestamp":1482883200000},"content-version":"vor","delay-in-days":366,"URL":"http:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/100006192","name":"Advanced Scientific Computing Research","doi-asserted-by":"crossref","id":[{"id":"10.13039\/100006192","id-type":"DOI","asserted-by":"crossref"}]},{"DOI":"10.13039\/100000015","name":"U.S. Department of Energy","doi-asserted-by":"crossref","id":[{"id":"10.13039\/100000015","id-type":"DOI","asserted-by":"crossref"}]},{"DOI":"10.13039\/100006132","name":"Office of Science","doi-asserted-by":"crossref","id":[{"id":"10.13039\/100006132","id-type":"DOI","asserted-by":"crossref"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["J. Emerg. Technol. Comput. Syst."],"published-print":{"date-parts":[[2016,7,26]]},"abstract":"<jats:p>Energy efficiency has now become the primary obstacle in scaling the performance of all classes of computing systems. Low-voltage computing, specifically, near-threshold voltage computing (NTC), which involves operating the transistor very close to and yet above its threshold voltage, holds the promise of providing many-fold improvement in energy efficiency. However, use of NTC also presents several challenges such as increased parametric variation, failure rate, and performance loss. This article surveys several recent techniques that aim to offset these challenges for fully leveraging the potential of NTC. By classifying these techniques along several dimensions, we also highlight their similarities and differences. It is hoped that this article will provide insights into state-of-the-art NTC techniques to researchers and system designers and inspire further research in this field.<\/jats:p>","DOI":"10.1145\/2821510","type":"journal-article","created":{"date-parts":[[2015,12,30]],"date-time":"2015-12-30T08:13:41Z","timestamp":1451463221000},"page":"1-26","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":18,"title":["A Survey of Architectural Techniques for Near-Threshold Computing"],"prefix":"10.1145","volume":"12","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-2908-993X","authenticated-orcid":false,"given":"Sparsh","family":"Mittal","sequence":"first","affiliation":[{"name":"Oak Ridge National Laboratory, Tennessee"}]}],"member":"320","published-online":{"date-parts":[[2015,12,28]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669128"},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2010.5416630"},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/CCGrid.2012.54"},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/2000064.2000118"},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.5555\/2014698.2014887"},{"key":"e_1_2_1_6_1","volume-title":"2nd Workshop on Near-Threshold Computing (WNTC\u201914)","author":"Ashraf Rizwan A.","unstructured":"Rizwan A. Ashraf, Ahmad Alzahrani, and Ronald F. DeMara. 2014. Extending modular redundancy to NTV: Costs and limits of resiliency at reduced supply voltage. In 2nd Workshop on Near-Threshold Computing (WNTC\u201914)."},{"key":"e_1_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/2485922.2485948"},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2014.54"},{"key":"e_1_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/2038698.2038715"},{"key":"e_1_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/IGCC.2013.6604500"},{"key":"e_1_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.5555\/2616606.2616815"},{"key":"e_1_2_1_12_1","volume-title":"IEEE International Solid-State Circuits Conference","author":"Benton","year":"2006","unstructured":"Benton H. Calhoun and Anantha Chandrakasan. 2006. A 256kb sub-threshold SRAM in 65nm CMOS. In IEEE International Solid-State Circuits Conference, 2006 (ISSCC\u201906). Digest of Technical Papers. IEEE, 2592--2601."},{"key":"e_1_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2013.6522319"},{"key":"e_1_2_1_14_1","volume-title":"2nd Workshop on Near-threshold Computing (WNTC\u201914)","author":"Chai Sek","year":"2014","unstructured":"Sek Chai, David Zhang, Jingwen Leng, and Vijay Janapa Reddi. 2014. Lightweight detection and recovery mechanisms to extend algorithm resiliency in noisy computation. In 2nd Workshop on Near-threshold Computing (WNTC\u201914)."},{"key":"e_1_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/1878921.1878956"},{"key":"e_1_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCSVT.2011.2105550"},{"key":"e_1_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1109\/.2005.1469239"},{"key":"e_1_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669126"},{"key":"e_1_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICROW.2012.18"},{"key":"e_1_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/2024724.2024940"},{"key":"e_1_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.5555\/1299042.1299046"},{"key":"e_1_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2008.4771813"},{"key":"e_1_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2013.4"},{"key":"e_1_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2009.2034764"},{"key":"e_1_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2015.7056055"},{"key":"e_1_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1109\/SBAC-PAD.2014.12"},{"key":"e_1_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.5555\/2014698.2014894"},{"key":"e_1_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1109\/DRC.2009.5354884"},{"key":"e_1_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1145\/2593069.2593184"},{"key":"e_1_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2009.2035060"},{"key":"e_1_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2014.6974729"},{"key":"e_1_2_1_32_1","volume-title":"International Symposium on Circuits and Systems (ISCAS\u201913)","author":"Han Yinhe","year":"2013","unstructured":"Yinhe Han, Ying Wang, Huawei Li, and Xiaowei Li. 2013. Enabling near-threshold voltage (NTV) operation in Multi-VDD cache for power reduction. In International Symposium on Circuits and Systems (ISCAS\u201913). 337--340."},{"key":"e_1_2_1_33_1","volume-title":"2nd Workshop on Near-Threshold Computing (WNTC\u201914)","author":"Hijaz Farrukh","year":"2014","unstructured":"Farrukh Hijaz and Omer Khan. 2014. Rethinking last-level cache management for multicores operating at near-threshold voltages. In 2nd Workshop on Near-Threshold Computing (WNTC\u201914)."},{"key":"e_1_2_1_34_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2013.6657029"},{"key":"e_1_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2014.6835977"},{"key":"e_1_2_1_36_1","doi-asserted-by":"publisher","DOI":"10.5555\/2354410.2355180"},{"key":"e_1_2_1_37_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2013.6522348"},{"key":"e_1_2_1_38_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2013.6522312"},{"key":"e_1_2_1_39_1","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2013.174"},{"key":"e_1_2_1_40_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2011.2173220"},{"key":"e_1_2_1_41_1","doi-asserted-by":"publisher","DOI":"10.5555\/266800.266818"},{"key":"e_1_2_1_42_1","doi-asserted-by":"publisher","DOI":"10.1109\/L-CA.2010.5"},{"key":"e_1_2_1_43_1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.897148"},{"key":"e_1_2_1_44_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2009.4977306"},{"key":"e_1_2_1_45_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2010.5452017"},{"key":"e_1_2_1_46_1","doi-asserted-by":"publisher","DOI":"10.1145\/1543136.1542459"},{"key":"e_1_2_1_47_1","doi-asserted-by":"publisher","DOI":"10.1145\/2038698.2038714"},{"key":"e_1_2_1_48_1","doi-asserted-by":"publisher","DOI":"10.1145\/2206781.2206840"},{"key":"e_1_2_1_49_1","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488837"},{"key":"e_1_2_1_50_1","doi-asserted-by":"publisher","unstructured":"Bojan Maric Jaume Abella and Mateo Valero. 2013b. Efficient cache architectures for reliable hybrid voltage operation using EDC codes. In Design Automation and Test in Europe. 917--920.","DOI":"10.5555\/2485288.2485508"},{"key":"e_1_2_1_51_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2012.6168942"},{"key":"e_1_2_1_52_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2010.28"},{"key":"e_1_2_1_53_1","doi-asserted-by":"publisher","DOI":"10.1145\/2366231.2337188"},{"key":"e_1_2_1_54_1","doi-asserted-by":"publisher","DOI":"10.1109\/L-CA.2011.36"},{"key":"e_1_2_1_55_1","doi-asserted-by":"crossref","unstructured":"Sparsh Mittal. 2014a. Power Management Techniques for Data Centers: A Survey. Technical Report ORNL\/TM-2014\/381. Oak Ridge National Laboratory USA.","DOI":"10.2172\/1150909"},{"key":"e_1_2_1_56_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.suscom.2013.11.001"},{"key":"e_1_2_1_57_1","doi-asserted-by":"publisher","DOI":"10.1504\/IJCAET.2014.065419"},{"key":"e_1_2_1_58_1","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2015.2426179"},{"key":"e_1_2_1_59_1","doi-asserted-by":"publisher","DOI":"10.1145\/2636342"},{"key":"e_1_2_1_60_1","unstructured":"NRDC. 2013. America\u2019s Data Centers Consuming and Wasting Growing Amounts of Energy. Retrieved from http:\/\/www.nrdc.org\/energy\/data-center-efficiency-assessment.asp."},{"key":"e_1_2_1_61_1","unstructured":"Oracle. 2014. Oracle Cranks Up The Cores To 32 With Sparc M7 Chip. Retrieved from http:\/\/www.enterprisetech.com\/2014\/08\/13\/oracle-cranks-cores-32-sparc-m7-chip\/."},{"key":"e_1_2_1_62_1","volume-title":"Enterprise power and cooling. ASPLOS Tutorial","author":"Patel Chandrakant","year":"2006","unstructured":"Chandrakant Patel and Parthasarathy Ranganathan. 2006. Enterprise power and cooling. ASPLOS Tutorial (2006)."},{"key":"e_1_2_1_63_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2011.52"},{"key":"e_1_2_1_64_1","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228571"},{"key":"e_1_2_1_65_1","doi-asserted-by":"publisher","DOI":"10.5555\/2133429.2133562"},{"key":"e_1_2_1_66_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.micpro.2008.03.012"},{"key":"e_1_2_1_67_1","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228536"},{"key":"e_1_2_1_68_1","doi-asserted-by":"publisher","unstructured":"Cristina Silvano Gianluca Palermo Sotirios Xydis and Ioannis Stamelakos. 2014. Voltage island management in near threshold manycore architectures to mitigate dark silicon. In Design Automation & Test in Europe. 1--6.","DOI":"10.5555\/2616606.2616853"},{"key":"e_1_2_1_69_1","volume-title":"Top500 List -","year":"2014","unstructured":"Top500. 2014. Top500 List - November 2014. Retrieved from http:\/\/www.top500.org\/list\/2014\/11\/."},{"key":"e_1_2_1_70_1","doi-asserted-by":"publisher","DOI":"10.1109\/MCSE.2015.4"},{"key":"e_1_2_1_71_1","doi-asserted-by":"publisher","DOI":"10.5555\/2561828.2561894"},{"key":"e_1_2_1_72_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2008.22"},{"key":"e_1_2_1_73_1","doi-asserted-by":"publisher","DOI":"10.1109\/IOLTS.2014.6873660"},{"key":"e_1_2_1_74_1","volume-title":"Flexicache: Highly reliable and low power cache under supply voltage scaling. In High Performance Computing","author":"Yalcin Gulay","year":"2014","unstructured":"Gulay Yalcin, Azam Seyedi, Osman S. Unsal, and Adrian Cristal. 2014b. Flexicache: Highly reliable and low power cache under supply voltage scaling. In High Performance Computing. Springer, 173--190."},{"key":"e_1_2_1_75_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2012.2231013"}],"container-title":["ACM Journal on Emerging Technologies in Computing Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2821510","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2821510","content-type":"application\/pdf","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2821510","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,11,18]],"date-time":"2025-11-18T09:19:19Z","timestamp":1763457559000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2821510"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,12,28]]},"references-count":75,"journal-issue":{"issue":"4","published-print":{"date-parts":[[2016,7,26]]}},"alternative-id":["10.1145\/2821510"],"URL":"https:\/\/doi.org\/10.1145\/2821510","relation":{},"ISSN":["1550-4832","1550-4840"],"issn-type":[{"value":"1550-4832","type":"print"},{"value":"1550-4840","type":"electronic"}],"subject":[],"published":{"date-parts":[[2015,12,28]]},"assertion":[{"value":"2015-03-01","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2015-09-01","order":2,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2015-12-28","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}