{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,8,18]],"date-time":"2026-08-18T01:42:00Z","timestamp":1787017320830,"version":"build-2736575974"},"reference-count":48,"publisher":"Association for Computing Machinery (ACM)","issue":"4","license":[{"start":{"date-parts":[[2015,11,16]],"date-time":"2015-11-16T00:00:00Z","timestamp":1447632000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"name":"John Goodacre at ARM"},{"name":"Edinburgh Compute and Data Facility (ECDF)"},{"name":"ARM Centre of Excellence at the University of Edinburgh"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Archit. Code Optim."],"published-print":{"date-parts":[[2016,1,7]]},"abstract":"<jats:p>Semiconductor device scaling has made single-ISA heterogeneous processors a reality. Heterogeneous processors contain a number of different CPU cores that all implement the same Instruction Set Architecture (ISA). This enables greater flexibility and specialization, as runtime constraints and workload characteristics can influence which core a given workload is run on. A major roadblock to the further development of heterogeneous processors is the lack of appropriate evaluation metrics. Existing metrics can be used to evaluate individual cores, but to evaluate a heterogeneous processor, the cores must be considered as a collective. Without appropriate metrics, it is impossible to establish design goals for processors, and it is difficult to accurately compare two different heterogeneous processors.<\/jats:p>\n                  <jats:p>\n                    We present four new metrics to evaluate user-oriented aspects of sets of heterogeneous cores:\n                    <jats:italic>localized nonuniformity<\/jats:italic>\n                    ,\n                    <jats:italic>gap overhead<\/jats:italic>\n                    ,\n                    <jats:italic>set overhead<\/jats:italic>\n                    , and\n                    <jats:italic>generality<\/jats:italic>\n                    . The metrics consider sets rather than individual cores. We use examples to demonstrate each metric, and show that the metrics can be used to quantify intuitions about heterogeneous cores.\n                  <\/jats:p>","DOI":"10.1145\/2829950","type":"journal-article","created":{"date-parts":[[2015,11,18]],"date-time":"2015-11-18T08:42:28Z","timestamp":1447836148000},"page":"1-25","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":7,"title":["Four Metrics to Evaluate Heterogeneous Multicores"],"prefix":"10.1145","volume":"12","author":[{"given":"Erik","family":"Tomusk","sequence":"first","affiliation":[{"name":"University of Edinburgh, United Kingdom"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Christophe","family":"Dubach","sequence":"additional","affiliation":[{"name":"University of Edinburgh, United Kingdom"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Michael","family":"O\u2019boyle","sequence":"additional","affiliation":[{"name":"University of Edinburgh, United Kingdom"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2015,11,16]]},"reference":[{"key":"e_1_2_2_1_1","doi-asserted-by":"publisher","DOI":"10.1002\/cta.757"},{"key":"e_1_2_2_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/EUC.2014.12"},{"key":"e_1_2_2_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2005.36"},{"key":"e_1_2_2_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/2024716.2024718"},{"key":"e_1_2_2_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/344166.344181"},{"key":"e_1_2_2_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2004.1382538"},{"key":"e_1_2_2_7_1","volume-title":"Practical Nonparametric Statistics","author":"Conover William J.","edition":"3"},{"key":"e_1_2_2_8_1","doi-asserted-by":"publisher","DOI":"10.5555\/2665671.2665743"},{"key":"e_1_2_2_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/4235.996017"},{"key":"e_1_2_2_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/2150976.2151004"},{"key":"e_1_2_2_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2010.14"},{"key":"e_1_2_2_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2008.44"},{"key":"e_1_2_2_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/2663346"},{"key":"e_1_2_2_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/CEC.2002.1007015"},{"key":"e_1_2_2_15_1","doi-asserted-by":"publisher","DOI":"10.5555\/603095.603101"},{"key":"e_1_2_2_16_1","volume-title":"White paper","author":"Greenhalgh Peter"},{"key":"e_1_2_2_17_1","volume-title":"IEEE 20th International Symposium on High Performance Computer Architecture. 154--164","author":"Guevara Marisabel","year":"2014"},{"key":"e_1_2_2_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/1403375.1403721"},{"key":"e_1_2_2_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/1250662.1250712"},{"key":"e_1_2_2_20_1","volume-title":"Proceedings of the 36th Annual IEEE\/ACM International Symposium on Microarchitecture. 81--92","author":"Kumar Rakesh","year":"2003"},{"key":"e_1_2_2_21_1","doi-asserted-by":"publisher","DOI":"10.1145\/1152154.1152162"},{"key":"e_1_2_2_22_1","doi-asserted-by":"publisher","DOI":"10.1145\/1168857.1168881"},{"key":"e_1_2_2_23_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2007.346211"},{"key":"e_1_2_2_24_1","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669172"},{"key":"e_1_2_2_25_1","volume-title":"IEEE 16th International Symposium on High Performance Computer Architecture. 1--12","author":"Li Tong","year":"2010"},{"key":"e_1_2_2_26_1","doi-asserted-by":"publisher","DOI":"10.1145\/2024724.2024818"},{"key":"e_1_2_2_27_1","doi-asserted-by":"publisher","DOI":"10.1145\/2628071.2628078"},{"key":"e_1_2_2_28_1","volume-title":"IEEE International Symposium on Performance Analysis of Systems and Software. 164--171","author":"Luo Kun","year":"2001"},{"key":"e_1_2_2_29_1","volume-title":"P\u00e9nzes","author":"Martin Alain J.","year":"2002"},{"key":"e_1_2_2_30_1","volume-title":"MediaTek launches the MediaTek Helio X20: The world\u2019s first mobile SoC featurint tri-cluster CPU Architecture. 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