{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,18]],"date-time":"2025-11-18T12:18:44Z","timestamp":1763468324894,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":38,"publisher":"ACM","license":[{"start":{"date-parts":[[2016,2,21]],"date-time":"2016-02-21T00:00:00Z","timestamp":1456012800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/501100001348","name":"Agency for Science, Technology and Research","doi-asserted-by":"publisher","award":["Human Sixth Sense Project"],"award-info":[{"award-number":["Human Sixth Sense Project"]}],"id":[{"id":"10.13039\/501100001348","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2016,2,21]]},"DOI":"10.1145\/2847263.2847274","type":"proceedings-article","created":{"date-parts":[[2016,2,4]],"date-time":"2016-02-04T16:26:02Z","timestamp":1454603162000},"page":"224-233","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":46,"title":["High Level Synthesis of Complex Applications"],"prefix":"10.1145","author":[{"given":"Xinheng","family":"Liu","sequence":"first","affiliation":[{"name":"University of Illinois at Urbana-Champaign, Urbana-Champaign, IL, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yao","family":"Chen","sequence":"additional","affiliation":[{"name":"Nankai University, Tianjin, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Tan","family":"Nguyen","sequence":"additional","affiliation":[{"name":"Advanced Digital Sciences Center, Singapore, Singapore"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Swathi","family":"Gurumani","sequence":"additional","affiliation":[{"name":"Advanced Digital Sciences Center, Singapore, Singapore"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kyle","family":"Rupnow","sequence":"additional","affiliation":[{"name":"Advanced Digital Sciences Center, Singapore, Singapore"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Deming","family":"Chen","sequence":"additional","affiliation":[{"name":"University of Illinois at Urbana-Champaign, Urbana-Champaign, IL, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2016,2,21]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"H.264: Advanced video coding for generic audiovisual services.  H.264: Advanced video coding for generic audiovisual services."},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1590\/S0104-65002007000100004"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2009.81"},{"key":"e_1_3_2_1_4_1","unstructured":"CALYPTO. Catapult C Synthesis. http:\/\/www.calypto.com\/catapult-c-synthesis.php.  CALYPTO. Catapult C Synthesis. http:\/\/www.calypto.com\/catapult-c-synthesis.php."},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/1950413.1950423"},{"key":"e_1_3_2_1_6_1","first-page":"25","volume-title":"SAMOS","author":"Casseau E.","year":"2009","unstructured":"E. Casseau and B. Le Gal . High-level synthesis for the design of FPGA-based signal processing systems . In SAMOS , pages 25 -- 32 , 2009 . E. Casseau and B. Le Gal. High-level synthesis for the design of FPGA-based signal processing systems. In SAMOS, pages 25--32, 2009."},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2011.15"},{"key":"e_1_3_2_1_8_1","first-page":"174","volume-title":"MEMOCODE","author":"Fleming K.","unstructured":"K. Fleming , C. C. Lin , N. Dave , G. Raghavan , J. Hicks , H. 264 decoder : A case study in multiple design points . In MEMOCODE , pages 165? 174 . IEEE, 2008. K. Fleming, C. C. Lin, N. Dave, G. Raghavan, J. Hicks, et al. H. 264 decoder: A case study in multiple design points. In MEMOCODE, pages 165?174. IEEE, 2008."},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1088\/1748-0221\/6\/02\/C02005"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/1403375.1403409"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2013.6509613"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.2197\/ipsjjip.17.242"},{"key":"e_1_3_2_1_13_1","unstructured":"F. HHI. JM H.264 Reference Software. http:\/\/iphome.hhi.de\/suehring\/tml\/.  F. HHI. JM H.264 Reference Software. http:\/\/iphome.hhi.de\/suehring\/tml\/."},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/ReConFig.2014.7032504"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2014.7082747"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/SIPS.2008.4671777"},{"key":"e_1_3_2_1_17_1","volume-title":"High-Level Synthesis Case Study: Implementation of a Memcached Server. arXiv preprint arXiv:1408.5387","author":"Karras K.","year":"2014","unstructured":"K. Karras , M. Blott , and K. Vissers . High-Level Synthesis Case Study: Implementation of a Memcached Server. arXiv preprint arXiv:1408.5387 , 2014 . K. Karras, M. Blott, and K. Vissers. High-Level Synthesis Case Study: Implementation of a Memcached Server. arXiv preprint arXiv:1408.5387, 2014."},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCE.2006.1649676"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/CCECE.2004.1345271"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1007\/s10617-012-9096-8"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/CERMA.2011.30"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.4236\/cs.2012.31001"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1109\/SASP.2009.5226333"},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2014.6983050"},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1145\/1391469.1391489"},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2011.6132716"},{"key":"e_1_3_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.5555\/1302494.1302844"},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2009.84"},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1109\/ReConFig.2013.6732298"},{"key":"e_1_3_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1145\/1233501.1233649"},{"key":"e_1_3_2_1_31_1","unstructured":"B. D. Technology. An independent Evaluation of High-Level Synthesis Tools for Xilinx FPGAs. http:\/\/www.bdti.com.  B. D. Technology. An independent Evaluation of High-Level Synthesis Tools for Xilinx FPGAs. http:\/\/www.bdti.com."},{"key":"e_1_3_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.1117\/12.821647"},{"key":"e_1_3_2_1_33_1","unstructured":"R. N. Tom\u00e9 A. N. Ord\u00f3\u00f1ez and P. P. Carballo. High level synthesis of a H. 264\/AVC decoder on FPGA platform.  R. N. Tom\u00e9 A. N. Ord\u00f3\u00f1ez and P. P. Carballo. High level synthesis of a H. 264\/AVC decoder on FPGA platform."},{"key":"e_1_3_2_1_34_1","first-page":"800","volume-title":"ISCAS","volume":"2","author":"Wang T.-C.","unstructured":"T.-C. Wang , Y.-W. Huang , H.-C. Fang , and L.-G. Chen . Parallel 4\u00d7 4 2D transform and inverse transform architecture for MPEG-4 AVC\/H. 264 . In ISCAS , volume 2 , pages II-- 800 . IEEE, 2003. T.-C. Wang, Y.-W. Huang, H.-C. Fang, and L.-G. Chen. Parallel 4\u00d7 4 2D transform and inverse transform architecture for MPEG-4 AVC\/H. 264. In ISCAS, volume 2, pages II--800. IEEE, 2003."},{"key":"e_1_3_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2013.6718388"},{"key":"e_1_3_2_1_36_1","unstructured":"Xilinx. Vivado High-Level Synthesis. http:\/\/www.xilinx.com\/products\/design-tools\/vivado\/integration\/esl-design.html.  Xilinx. Vivado High-Level Synthesis. http:\/\/www.xilinx.com\/products\/design-tools\/vivado\/integration\/esl-design.html."},{"key":"e_1_3_2_1_37_1","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2013.6645541"},{"key":"e_1_3_2_1_38_1","doi-asserted-by":"publisher","DOI":"10.1145\/2554688.2554775"}],"event":{"name":"FPGA'16: The 2016 ACM\/SIGDA International Symposium on Field-Programmable Gate Arrays","sponsor":["SIGDA ACM Special Interest Group on Design Automation"],"location":"Monterey California USA","acronym":"FPGA'16"},"container-title":["Proceedings of the 2016 ACM\/SIGDA International Symposium on Field-Programmable Gate Arrays"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2847263.2847274","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2847263.2847274","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T05:48:23Z","timestamp":1750225703000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2847263.2847274"}},"subtitle":["An H.264 Video Decoder"],"short-title":[],"issued":{"date-parts":[[2016,2,21]]},"references-count":38,"alternative-id":["10.1145\/2847263.2847274","10.1145\/2847263"],"URL":"https:\/\/doi.org\/10.1145\/2847263.2847274","relation":{},"subject":[],"published":{"date-parts":[[2016,2,21]]},"assertion":[{"value":"2016-02-21","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}