{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,7]],"date-time":"2026-01-07T07:57:46Z","timestamp":1767772666451,"version":"3.41.0"},"reference-count":31,"publisher":"Association for Computing Machinery (ACM)","issue":"1","license":[{"start":{"date-parts":[[2016,5,6]],"date-time":"2016-05-06T00:00:00Z","timestamp":1462492800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["J. Emerg. Technol. Comput. Syst."],"published-print":{"date-parts":[[2017,1,31]]},"abstract":"<jats:p>In this work, we have studied two novel techniques to enhance the performance of existing geometry-based magnetoresistive RAM physically unclonable function (MRAM PUF). Geometry-based MRAM PUFs rely only on geometric variations in MRAM cells that generate preferred ground state in cells and form the basis of digital signature generation. Here we study two novel ways to improve the performance of the geometry-based PUF signature. First, we study how the choice between specific geometries can enhance the reliability of the digital signature. Using fabrications and simulations, we study how the rectangular shape in the PUF cells is more susceptible to lithography-based geometric variations than the elliptical shape of the same aspect ratio. The choice of rectangular over elliptical masks in the lithography process can therefore improve the reliability of the digital signature from PUF. Second, we present a MRAM PUF architecture and study how resistances in MRAM cells can be used to generate analog voltage output that are easier to detect if probed by an adversary. In the new PUF architecture, we have the choice between selection of rows and columns to generate unique and hard-to-predict analog voltage outputs. For a 64-bit response, the analog voltage output can range between 20 and 500 mV, making it tough for an adversary to guess over this wide range of voltages. This work ends with a discussion on the threat resilience ability of the new improved MRAM PUF to attacks from probing-, tampering-, reuse-, and simulation-based models.<\/jats:p>","DOI":"10.1145\/2854154","type":"journal-article","created":{"date-parts":[[2016,5,6]],"date-time":"2016-05-06T12:59:12Z","timestamp":1462539552000},"page":"1-15","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":7,"title":["MRAM PUF"],"prefix":"10.1145","volume":"13","author":[{"given":"Jayita","family":"Das","sequence":"first","affiliation":[{"name":"University of South Florida"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kevin","family":"Scott","sequence":"additional","affiliation":[{"name":"University of South Florida"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sanjukta","family":"Bhanja","sequence":"additional","affiliation":[{"name":"University of South Florida"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2016,5,6]]},"reference":[{"key":"e_1_2_1_1_1","volume-title":"Proceedings of the 16th USENIX Security Symposium (SS\u201907)","author":"Alkabani Yousra","year":"2007","unstructured":"Yousra Alkabani and Farinaz Koushanfar . 2007 . Active hardware metering for intellectual property protection and security . In Proceedings of the 16th USENIX Security Symposium (SS\u201907) . 291--306. Yousra Alkabani and Farinaz Koushanfar. 2007. Active hardware metering for intellectual property protection and security. In Proceedings of the 16th USENIX Security Symposium (SS\u201907). 291--306."},{"volume-title":"Proceedings of the IEEE Conference on Faible Tension and Faible Consommation (FTFC\u201913)","author":"Cargnini L. V.","unstructured":"L. V. Cargnini , L. Torres , R. M. Brum , S. Senni , and G. Sassatelli . 2013. Embedded memory hierarchy exploration based on magnetic RAM . In Proceedings of the IEEE Conference on Faible Tension and Faible Consommation (FTFC\u201913) . 1--4. L. V. Cargnini, L. Torres, R. M. Brum, S. Senni, and G. Sassatelli. 2013. Embedded memory hierarchy exploration based on magnetic RAM. In Proceedings of the IEEE Conference on Faible Tension and Faible Consommation (FTFC\u201913). 1--4.","key":"e_1_2_1_2_1"},{"doi-asserted-by":"publisher","key":"e_1_2_1_3_1","DOI":"10.1109\/TNANO.2002.807380"},{"doi-asserted-by":"publisher","key":"e_1_2_1_4_1","DOI":"10.1109\/IWCE.2010.5677954"},{"doi-asserted-by":"publisher","key":"e_1_2_1_5_1","DOI":"10.1109\/JETCAS.2011.2158344"},{"doi-asserted-by":"publisher","key":"e_1_2_1_6_1","DOI":"10.1109\/TCSI.2014.2333356"},{"doi-asserted-by":"publisher","key":"e_1_2_1_7_1","DOI":"10.1109\/NANO.2014.6968027"},{"doi-asserted-by":"publisher","key":"e_1_2_1_8_1","DOI":"10.1109\/TNANO.2015.2397951"},{"doi-asserted-by":"crossref","unstructured":"M. J. Donahue and D. G. Porter. 1999. OOMMF Users Guide Version 1.0. Interagency Report NISTIR 6376. NIST Gaithersburg MD.  M. J. Donahue and D. G. Porter. 1999. OOMMF Users Guide Version 1.0. Interagency Report NISTIR 6376. NIST Gaithersburg MD.","key":"e_1_2_1_9_1","DOI":"10.6028\/NIST.IR.6376"},{"volume-title":"Retrieved","year":"2014","unstructured":"Everspin. 2014 . Everspin Technologies Home Page . Retrieved March 23, 2016, from http:\/\/www.everspin.com Everspin. 2014. Everspin Technologies Home Page. Retrieved March 23, 2016, from http:\/\/www.everspin.com","key":"e_1_2_1_10_1"},{"key":"e_1_2_1_11_1","first-page":"849","article-title":"Process for producing and inspecting a lithographic reticle and fabricating semiconductor devices using same","volume":"5","author":"Fu Chong-Cheng","year":"1998","unstructured":"Chong-Cheng Fu , Michael E. Kling , Kevin D. Lucas , James Morrow , and Alfred J. Reich . 1998 . Process for producing and inspecting a lithographic reticle and fabricating semiconductor devices using same . US Patent 5 , 849 ,440. Chong-Cheng Fu, Michael E. Kling, Kevin D. Lucas, James Morrow, and Alfred J. Reich. 1998. Process for producing and inspecting a lithographic reticle and fabricating semiconductor devices using same. US Patent 5,849,440.","journal-title":"US Patent"},{"doi-asserted-by":"publisher","key":"e_1_2_1_12_1","DOI":"10.1007\/s10796-008-9142-z"},{"key":"e_1_2_1_13_1","volume-title":"Magnetic Domains: The Analysis of Magnetic Microstructures","author":"Hubert Alex","year":"1998","unstructured":"Alex Hubert and Rudolf Sch\u00e4fer . 1998 . Magnetic Domains: The Analysis of Magnetic Microstructures . Springer . Alex Hubert and Rudolf Sch\u00e4fer. 1998. Magnetic Domains: The Analysis of Magnetic Microstructures. Springer."},{"doi-asserted-by":"publisher","key":"e_1_2_1_14_1","DOI":"10.5555\/2485288.2485390"},{"doi-asserted-by":"publisher","key":"e_1_2_1_15_1","DOI":"10.1088\/0953-8984\/23\/5\/053202"},{"doi-asserted-by":"publisher","key":"e_1_2_1_16_1","DOI":"10.1109\/VLSIC.2004.1346548"},{"doi-asserted-by":"publisher","key":"e_1_2_1_17_1","DOI":"10.1143\/JJAP.42.L499"},{"key":"e_1_2_1_18_1","volume-title":"Proceedings of the IEEE International Conference on Solid-State Circuits (ISSCC\u201901)","author":"Naji P. K.","year":"2001","unstructured":"P. K. Naji , M. Durlam , S. Tehrani , J. Calder , and M. F. DeHerrera . 2001. A 256kb 3.0V 1T1MTJ nonvolatile magnetoresistive RAM . In Proceedings of the IEEE International Conference on Solid-State Circuits (ISSCC\u201901) . 122--123. DOI:http:\/\/dx.doi.org\/10.1109\/ISSCC. 2001 .912570 10.1109\/ISSCC.2001.912570 P. K. Naji, M. Durlam, S. Tehrani, J. Calder, and M. F. DeHerrera. 2001. A 256kb 3.0V 1T1MTJ nonvolatile magnetoresistive RAM. In Proceedings of the IEEE International Conference on Solid-State Circuits (ISSCC\u201901). 122--123. DOI:http:\/\/dx.doi.org\/10.1109\/ISSCC.2001.912570"},{"key":"e_1_2_1_19_1","volume-title":"Retrieved","author":"NXP.","year":"2013","unstructured":"NXP. 2013 . PUF\u2014Physical Unclonable Functions: Protecting Next-Generation Smart Card ICs with SRAM-Based PUFs . Retrieved March 23, 2016, from http:\/\/www.nxp.com\/documents\/other\/75017366.pdf. NXP. 2013. PUF\u2014Physical Unclonable Functions: Protecting Next-Generation Smart Card ICs with SRAM-Based PUFs. Retrieved March 23, 2016, from http:\/\/www.nxp.com\/documents\/other\/75017366.pdf."},{"key":"e_1_2_1_20_1","volume-title":"Retrieved","author":"Model Predictive Technology","year":"2012","unstructured":"Predictive Technology Model . 2012 . Latest Models . Retrieved March 23, 2016, from http:\/\/ptm.asu.edu. Predictive Technology Model. 2012. Latest Models. Retrieved March 23, 2016, from http:\/\/ptm.asu.edu."},{"doi-asserted-by":"publisher","key":"e_1_2_1_21_1","DOI":"10.1109\/ISVLSI.2012.40"},{"doi-asserted-by":"publisher","key":"e_1_2_1_23_1","DOI":"10.5555\/2561828.2561987"},{"doi-asserted-by":"publisher","key":"e_1_2_1_24_1","DOI":"10.1109\/TNANO.2010.2049367"},{"doi-asserted-by":"publisher","key":"e_1_2_1_25_1","DOI":"10.1109\/SP.2013.27"},{"doi-asserted-by":"publisher","key":"e_1_2_1_26_1","DOI":"10.1145\/1278480.1278484"},{"doi-asserted-by":"publisher","key":"e_1_2_1_27_1","DOI":"10.5555\/2133429.2133520"},{"doi-asserted-by":"publisher","key":"e_1_2_1_28_1","DOI":"10.1109\/20.908581"},{"doi-asserted-by":"publisher","key":"e_1_2_1_29_1","DOI":"10.1109\/JPROC.2010.2064150"},{"doi-asserted-by":"publisher","key":"e_1_2_1_30_1","DOI":"10.1109\/TMAG.2008.2003059"},{"doi-asserted-by":"publisher","key":"e_1_2_1_31_1","DOI":"10.1109\/ISCAS.2014.6865598"},{"doi-asserted-by":"publisher","key":"e_1_2_1_32_1","DOI":"10.1016\/S1369-7021(06)71693-5"}],"container-title":["ACM Journal on Emerging Technologies in Computing Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2854154","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2854154","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T05:48:47Z","timestamp":1750225727000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2854154"}},"subtitle":["Using Geometric and Resistive Variations in MRAM Cells"],"short-title":[],"issued":{"date-parts":[[2016,5,6]]},"references-count":31,"journal-issue":{"issue":"1","published-print":{"date-parts":[[2017,1,31]]}},"alternative-id":["10.1145\/2854154"],"URL":"https:\/\/doi.org\/10.1145\/2854154","relation":{},"ISSN":["1550-4832","1550-4840"],"issn-type":[{"type":"print","value":"1550-4832"},{"type":"electronic","value":"1550-4840"}],"subject":[],"published":{"date-parts":[[2016,5,6]]},"assertion":[{"value":"2014-12-01","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2015-11-01","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2016-05-06","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}