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Code Optim."],"published-print":{"date-parts":[[2016,4,5]]},"abstract":"<jats:p>Dynamic binary translation is a technology for transparently translating and modifying a program at the machine code level as it is running. A significant factor in the performance of a dynamic binary translator is its handling of indirect branches. Unlike direct branches, which have a known target at translation time, an indirect branch requires translating a source program counter address to a translated program counter address every time the branch is executed. This translation can impose a serious runtime penalty if it is not handled efficiently.<\/jats:p>\n          <jats:p>\n            MAMBO-X64, a dynamic binary translator that translates 32-bit ARM (AArch32) code to 64-bit ARM (AArch64) code, uses three novel techniques to improve the performance of indirect branch translation. Together, these techniques allow MAMBO-X64 to achieve a very low performance overhead of only 10% on average compared to native execution of 32-bit programs.\n            <jats:italic>Hardware-assisted function returns<\/jats:italic>\n            use a software return address stack to predict the targets of function returns, making use of several novel optimizations while also exploiting hardware return address prediction. This technique has a significant impact on most benchmarks, reducing binary translation overhead compared to native execution by 40% on average and by 90% on some benchmarks.\n            <jats:italic>Branch table inference<\/jats:italic>\n            , an algorithm for detecting and translating branch tables, can reduce the overhead of translated code by up to 40% on some SPEC CPU2006 benchmarks. The remaining indirect branches are handled using a\n            <jats:italic>fast atomic hash table<\/jats:italic>\n            , which is optimized to work with multiple threads. This last technique translates indirect branches using a single shared hash table while avoiding expensive synchronization in performance-critical lookup code. This allows the performance to be on par with thread-private hash tables while having superior memory scalability.\n          <\/jats:p>","DOI":"10.1145\/2866573","type":"journal-article","created":{"date-parts":[[2016,4,5]],"date-time":"2016-04-05T15:18:51Z","timestamp":1459869531000},"page":"1-25","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":21,"title":["Optimizing Indirect Branches in Dynamic Binary Translators"],"prefix":"10.1145","volume":"13","author":[{"given":"Amanieu","family":"d'Antras","sequence":"first","affiliation":[{"name":"School of Computer Science, University of Manchester, Manchester, United Kingdom"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Cosmin","family":"Gorgovan","sequence":"additional","affiliation":[{"name":"School of Computer Science, University of Manchester, Manchester, United Kingdom"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jim","family":"Garside","sequence":"additional","affiliation":[{"name":"School of Computer Science, University of Manchester, Manchester, United Kingdom"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Mikel","family":"Luj\u00e1n","sequence":"additional","affiliation":[{"name":"School of Computer Science, University of Manchester, Manchester, United Kingdom"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2016,4,5]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/1168857.1168860"},{"key":"e_1_2_1_2_1","volume-title":"Proceedings of the 2005 USENIX Annual Technical Conference. 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An infrastructure for adaptive dynamic optimization. In Proceedings of the 1st IEEE\/ACM International Symposium on Code Generation and Optimization (CGO'03). IEEE Computer Society, 265--275. DOI:http:\/\/dx.doi.org\/10.1109\/ CGO.2003.1191551"},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/CGO.2006.36"},{"key":"e_1_2_1_5_1","volume-title":"Proceedings of the 8th International Conference on Virtual Execution Environments (VEE'12)","author":"Bruening Derek","unstructured":"Derek Bruening , Qin Zhao , and Saman P. Amarasinghe . 2012. Transparent dynamic instrumentation . In Proceedings of the 8th International Conference on Virtual Execution Environments (VEE'12) . ACM, 133--144. DOI:http:\/\/dx.doi.org\/10.1145\/2151024.2151043 10.1145\/2151024.2151043 Derek Bruening, Qin Zhao, and Saman P. Amarasinghe. 2012. Transparent dynamic instrumentation. In Proceedings of the 8th International Conference on Virtual Execution Environments (VEE'12). ACM, 133--144. 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