{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,11,6]],"date-time":"2026-11-06T17:38:38Z","timestamp":1793986718503,"version":"4.8.0"},"publisher-location":"New York, NY, USA","reference-count":44,"publisher":"ACM","license":[{"start":{"date-parts":[[2016,3,25]],"date-time":"2016-03-25T00:00:00Z","timestamp":1458864000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2016,3,25]]},"DOI":"10.1145\/2872362.2872377","type":"proceedings-article","created":{"date-parts":[[2016,3,28]],"date-time":"2016-03-28T09:24:30Z","timestamp":1459157070000},"page":"263-276","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":49,"title":["Silent Shredder"],"prefix":"10.1145","author":[{"given":"Amro","family":"Awad","sequence":"first","affiliation":[{"name":"North Carolina State University, Raleigh, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Pratyusa","family":"Manadhata","sequence":"additional","affiliation":[{"name":"Hewlett Packard Lab, Princeton, NJ, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Stuart","family":"Haber","sequence":"additional","affiliation":[{"name":"Hewlett Packard Lab, Princeton, NJ, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Yan","family":"Solihin","sequence":"additional","affiliation":[{"name":"North Carolina State University, Raleigh, NC, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"William","family":"Horne","sequence":"additional","affiliation":[{"name":"Hewlett Packard Lab, Princeton, NJ, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2016,3,25]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"Intel 3D XPoint. URL http:\/\/newsroom.intel.com\/docs\/DOC-6713.  Intel 3D XPoint. URL http:\/\/newsroom.intel.com\/docs\/DOC-6713."},{"key":"e_1_3_2_1_2_1","unstructured":"FreeBSD. URL http:\/\/www.freebsd.org\/doc\/en_US.ISO8859--1\/articles\/vm-design\/prefault-optimizations.html.  FreeBSD. URL http:\/\/www.freebsd.org\/doc\/en_US.ISO8859--1\/articles\/vm-design\/prefault-optimizations.html."},{"key":"e_1_3_2_1_3_1","volume-title":"Intel 64 and IA-32 Architectures Software Developer's Manual","year":"2012","unstructured":"Intel. Intel 64 and IA-32 Architectures Software Developer's Manual , Volume 3a, Chapter 11 , Page 12. April 2012 . Intel. Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 3a, Chapter 11, Page 12. April 2012."},{"key":"e_1_3_2_1_4_1","unstructured":"The Machine: A new kind of computer. URL http:\/\/www.hpl.hp.com\/research\/systems-research\/themachine\/.  The Machine: A new kind of computer. URL http:\/\/www.hpl.hp.com\/research\/systems-research\/themachine\/."},{"key":"e_1_3_2_1_5_1","volume-title":"SPEC CPU2000 and CPU2006","author":"SPEC","unstructured":"SPEC , SPEC CPU2000 and CPU2006 , http:\/\/www.spec.org\/. SPEC, SPEC CPU2000 and CPU2006, http:\/\/www.spec.org\/."},{"key":"e_1_3_2_1_6_1","volume-title":"yiming, et al. \"observation of spin-transfer switching in deep submicron-sized and low-resistance magnetic tunnel junctions.\" Applied Physics Letters 84.16: 3118--3120","author":"Huai","year":"2004","unstructured":"Huai , yiming, et al. \"observation of spin-transfer switching in deep submicron-sized and low-resistance magnetic tunnel junctions.\" Applied Physics Letters 84.16: 3118--3120 , 2004 . Huai, yiming, et al. \"observation of spin-transfer switching in deep submicron-sized and low-resistance magnetic tunnel junctions.\" Applied Physics Letters 84.16: 3118--3120, 2004."},{"key":"e_1_3_2_1_7_1","unstructured":"Understanding Memory Resource Management in VMware vSphere\u00ae 5.0.  Understanding Memory Resource Management in VMware vSphere\u00ae 5.0."},{"key":"e_1_3_2_1_8_1","volume-title":"the proceedings of the IEEE 20th International Symposium on High Performance Computer Architecture (HPCA-20)","author":"Exploring","year":"2013","unstructured":"Exploring high-performance and energy proportional interface for phase change memory systems. the proceedings of the IEEE 20th International Symposium on High Performance Computer Architecture (HPCA-20) , 2013 , 0: 210--221, 2013. ISSN 1530-0897. http:\/\/doi.ieeecomputersociety.org\/10.1109\/HPCA.2013.6522320. Exploring high-performance and energy proportional interface for phase change memory systems. the proceedings of the IEEE 20th International Symposium on High Performance Computer Architecture (HPCA-20), 2013, 0: 210--221, 2013. ISSN 1530-0897. http:\/\/doi.ieeecomputersociety.org\/10.1109\/HPCA.2013.6522320."},{"key":"e_1_3_2_1_9_1","volume-title":"Operating Systems: Three Easy Pieces","author":"Arpaci-Dusseau R. H.","year":"2014","unstructured":"R. H. Arpaci-Dusseau and A. C. Arpaci-Dusseau . Operating Systems: Three Easy Pieces . Arpaci-Dusseau Books , 0.80 edition, May 2014 . R. H. Arpaci-Dusseau and A. C. Arpaci-Dusseau. Operating Systems: Three Easy Pieces. Arpaci-Dusseau Books, 0.80 edition, May 2014."},{"key":"e_1_3_2_1_10_1","volume-title":"The Netflix Prize. In In KDD Cup and Workshop in conjunction with KDD","author":"Bennett J.","year":"2007","unstructured":"J. Bennett and S. L. and. The Netflix Prize. In In KDD Cup and Workshop in conjunction with KDD , 2007 . J. Bennett and S. L. and. The Netflix Prize. In In KDD Cup and Workshop in conjunction with KDD, 2007."},{"key":"e_1_3_2_1_11_1","volume-title":"Implications of CPU caching on byte-addressable non-volatile memory programming. Technical report","author":"Bhandari K.","year":"2012","unstructured":"K. Bhandari , D. R. Chakrabarti , and H.-J. Boehm . Implications of CPU caching on byte-addressable non-volatile memory programming. Technical report , 2012 . K. Bhandari, D. R. Chakrabarti, and H.-J. Boehm. Implications of CPU caching on byte-addressable non-volatile memory programming. Technical report, 2012."},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/2024716.2024718"},{"key":"e_1_3_2_1_13_1","volume-title":"Understanding The Linux Kernel","author":"Bovet D.","year":"2005","unstructured":"D. Bovet and M. Cesati . Understanding The Linux Kernel . Oreilly & Associates Inc, 2005 . ISBN 0596005652. D. Bovet and M. Cesati. Understanding The Linux Kernel. Oreilly & Associates Inc, 2005. ISBN 0596005652."},{"key":"e_1_3_2_1_14_1","volume-title":"IEEE 4th Workshop on Memory Performance Issues","author":"Calhoun M.","year":"2006","unstructured":"M. Calhoun , S. Rixner , and A. L. Cox . Optimizing kernel block memory operations . In IEEE 4th Workshop on Memory Performance Issues , Feb. 2006 . M. Calhoun, S. Rixner, and A. L. Cox. Optimizing kernel block memory operations. In IEEE 4th Workshop on Memory Performance Issues, Feb. 2006."},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/2660193.2660224"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/2000064.2000086"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669157"},{"key":"e_1_3_2_1_18_1","first-page":"22","volume-title":"the proceedings of the 14th Conference on USENIX Security Symposium (SSYM-14), 2005, SSYM'05","author":"Chow J.","year":"2005","unstructured":"J. Chow , B. Pfaff , T. Garfinkel , and M. Rosenblum . Shredding your garbage: Reducing data lifetime through secure deallocation . In the proceedings of the 14th Conference on USENIX Security Symposium (SSYM-14), 2005, SSYM'05 , pages 22 -- 22 , Berkeley, CA, USA , 2005 . USENIX Association. URL http:\/\/dl.acm.org\/citation.cfm?id=1251398.1251420. J. Chow, B. Pfaff, T. Garfinkel, and M. Rosenblum. Shredding your garbage: Reducing data lifetime through secure deallocation. In the proceedings of the 14th Conference on USENIX Security Symposium (SSYM-14), 2005, SSYM'05, pages 22--22, Berkeley, CA, USA, 2005. USENIX Association. URL http:\/\/dl.acm.org\/citation.cfm?id=1251398.1251420."},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/1250662.1250665"},{"key":"e_1_3_2_1_20_1","first-page":"17","volume-title":"the proceedings of the 10th USENIX Conference on Operating Systems Design and Implementation (OSDI-10), 2012, OSDI'12","author":"Gonzalez J. E.","year":"2012","unstructured":"J. E. Gonzalez , Y. Low , H. Gu , D. Bickson , and C. Guestrin . Powergraph: Distributed graph-parallel computation on natural graphs . In the proceedings of the 10th USENIX Conference on Operating Systems Design and Implementation (OSDI-10), 2012, OSDI'12 , pages 17 -- 30 , Berkeley, CA, USA , 2012 . USENIX Association. ISBN 978-1-931971-96-6. URL http:\/\/dl.acm.org\/citation.cfm?id=2387880.2387883. J. E. Gonzalez, Y. Low, H. Gu, D. Bickson, and C. Guestrin. Powergraph: Distributed graph-parallel computation on natural graphs. In the proceedings of the 10th USENIX Conference on Operating Systems Design and Implementation (OSDI-10), 2012, OSDI'12, pages 17--30, Berkeley, CA, USA, 2012. USENIX Association. ISBN 978-1-931971-96-6. URL http:\/\/dl.acm.org\/citation.cfm?id=2387880.2387883."},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.2009.31"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2002.1003577"},{"key":"e_1_3_2_1_23_1","first-page":"455","volume-title":"ACM SIGPLAN Notices","author":"Liu R.-S.","year":"2014","unstructured":"R.-S. Liu , D.-Y. Shen , C.-L. Yang , S.-C. Yu , and C.-Y. M. Wang . NVM Duet: Unified working memory and persistent store architecture . In ACM SIGPLAN Notices , volume 49 , pages 455 -- 470 . ACM , 2014 . R.-S. Liu, D.-Y. Shen, C.-L. Yang, S.-C. Yu, and C.-Y. M. Wang. NVM Duet: Unified working memory and persistent store architecture. In ACM SIGPLAN Notices, volume 49, pages 455--470. ACM, 2014."},{"key":"e_1_3_2_1_25_1","unstructured":"N. Muralimanohar and R. Balasubramonian. Cacti 6.0: A Tool to Model Large Caches.  N. Muralimanohar and R. Balasubramonian. Cacti 6.0: A Tool to Model Large Caches."},{"key":"e_1_3_2_1_26_1","first-page":"32","volume-title":"Invited Article in Supercomputing Frontiers and Innovations (SUPERFRI)","author":"Mutlu O.","year":"2015","unstructured":"O. Mutlu and L. Subramanian . Research Problems and Opportunities in Memory Systems . Invited Article in Supercomputing Frontiers and Innovations (SUPERFRI) , 2015 ., pages 32 -- 34 . O. Mutlu and L. Subramanian. Research Problems and Opportunities in Memory Systems. Invited Article in Supercomputing Frontiers and Innovations (SUPERFRI), 2015., pages 32--34."},{"key":"e_1_3_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1145\/2485922.2485929"},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1145\/1250734.1250736"},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2014.6835964"},{"key":"e_1_3_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669117"},{"key":"e_1_3_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2007.16"},{"key":"e_1_3_2_1_32_1","volume-title":"Windows Internals: Including Windows Server 2008 and Windows Vista","author":"Russinovich M.","year":"2009","unstructured":"M. Russinovich and D. A. Solomon . Windows Internals: Including Windows Server 2008 and Windows Vista , Fifth Edition. Microsoft Press , 5 th edition, 2009 . ISBN 0735625301, 9780735625303. M. Russinovich and D. A. Solomon. Windows Internals: Including Windows Server 2008 and Windows Vista, Fifth Edition. Microsoft Press, 5th edition, 2009. ISBN 0735625301, 9780735625303."},{"key":"e_1_3_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1145\/2628071.2628083"},{"key":"e_1_3_2_1_34_1","doi-asserted-by":"publisher","DOI":"10.1145\/2540708.2540725"},{"key":"e_1_3_2_1_35_1","first-page":"0321278542","author":"Singh A.","year":"2006","unstructured":"A. Singh . Mac OS X Internals . Addison-Wesley Professional , 2006 . ISBN 0321278542 . A. Singh. Mac OS X Internals. Addison-Wesley Professional, 2006. ISBN 0321278542.","journal-title":"Addison-Wesley Professional"},{"key":"e_1_3_2_1_36_1","volume-title":"Cryptography and Network Security","author":"Stallings W.","year":"2014","unstructured":"W. Stallings . Cryptography and Network Security ( 6 th ed.). 2014 . W. Stallings. Cryptography and Network Security (6th ed.). 2014.","edition":"6"},{"key":"e_1_3_2_1_37_1","first-page":"2013","volume":"25","author":"Stuecheli J.","year":"2013","unstructured":"J. Stuecheli . Power8 . In Hot Chips. Vol. 25 . 2013 ., 2013 . J. Stuecheli. Power8. In Hot Chips. Vol. 25. 2013., 2013.","journal-title":"Hot Chips."},{"key":"e_1_3_2_1_38_1","first-page":"3","volume-title":"the proceedings of the ACM SIGPLAN Workshop on Memory Systems Performance and Correctness","author":"Valat CLEARS.","unstructured":"che, and Jalby] CLEARS. Valat , M. P\u00e9rache , and W. Jalby . Introducing kernel-level page reuse for high performance computing . In the proceedings of the ACM SIGPLAN Workshop on Memory Systems Performance and Correctness , page 3 . ACM, 2013. che, and Jalby]CLEARS. Valat, M. P\u00e9rache, and W. Jalby. Introducing kernel-level page reuse for high performance computing. In the proceedings of the ACM SIGPLAN Workshop on Memory Systems Performance and Correctness, page 3. ACM, 2013."},{"key":"e_1_3_2_1_39_1","doi-asserted-by":"publisher","DOI":"10.1145\/1961296.1950379"},{"key":"e_1_3_2_1_40_1","doi-asserted-by":"publisher","DOI":"10.1145\/1150019.1136502"},{"key":"e_1_3_2_1_41_1","volume-title":"Memristive devices for computing. Nature nanotechnology, 8 (1): 13--24","author":"Yang J. J.","year":"2013","unstructured":"J. J. Yang , D. B. Strukov , and D. R. Stewart . Memristive devices for computing. Nature nanotechnology, 8 (1): 13--24 , 2013 . J. J. Yang, D. B. Strukov, and D. R. Stewart. Memristive devices for computing. Nature nanotechnology, 8 (1): 13--24, 2013."},{"key":"e_1_3_2_1_42_1","doi-asserted-by":"publisher","DOI":"10.1145\/2048066.2048092"},{"key":"e_1_3_2_1_43_1","unstructured":"V. Young P. J. Nair and M. K. Qureshi. DEUCE: Write-Efficient Encryption for Non-Volatile Memories. In the proceedings of the 20th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-20) 2015 ASPLOS '15 pages 33--44 New York NY USA 2015. ACM. ISBN 978--1--4503--2835--7. 10.1145\/2694344.2694387. URL http:\/\/doi.acm.org\/10.1145\/2694344.2694387.  V. Young P. J. Nair and M. K. Qureshi. DEUCE: Write-Efficient Encryption for Non-Volatile Memories. In the proceedings of the 20th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-20) 2015 ASPLOS '15 pages 33--44 New York NY USA 2015. ACM. ISBN 978--1--4503--2835--7. 10.1145\/2694344.2694387. URL http:\/\/doi.acm.org\/10.1145\/2694344.2694387."},{"key":"e_1_3_2_1_44_1","volume-title":"Social computing data repository at ASU","author":"Zafarani R.","year":"2009","unstructured":"R. Zafarani and H. Liu . Social computing data repository at ASU , 2009 . URL http:\/\/socialcomputing.asu.edu. R. Zafarani and H. Liu. Social computing data repository at ASU, 2009. URL http:\/\/socialcomputing.asu.edu."},{"key":"e_1_3_2_1_45_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555759"}],"event":{"name":"ASPLOS '16: Architectural Support for Programming Languages and Operating Systems","location":"Atlanta Georgia USA","acronym":"ASPLOS '16","sponsor":["SIGPLAN ACM Special Interest Group on Programming Languages","SIGOPS ACM Special Interest Group on Operating Systems","SIGARCH ACM Special Interest Group on Computer Architecture","SIGBED ACM Special Interest Group on Embedded Systems"]},"container-title":["Proceedings of the Twenty-First International Conference on Architectural Support for Programming Languages and Operating Systems"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2872362.2872377","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2872362.2872377","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T00:39:16Z","timestamp":1750207156000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2872362.2872377"}},"subtitle":["Zero-Cost Shredding for Secure Non-Volatile Main Memory Controllers"],"short-title":[],"issued":{"date-parts":[[2016,3,25]]},"references-count":44,"alternative-id":["10.1145\/2872362.2872377","10.1145\/2872362"],"URL":"https:\/\/doi.org\/10.1145\/2872362.2872377","relation":{"is-identical-to":[{"id-type":"doi","id":"10.1145\/2980024.2872377","asserted-by":"object"},{"id-type":"doi","id":"10.1145\/2954679.2872377","asserted-by":"object"}]},"subject":[],"published":{"date-parts":[[2016,3,25]]},"assertion":[{"value":"2016-03-25","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}