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We propose to construct mode-reconfigurable clock trees (MRCTs) based on mode separation and scenario compression. The technique of scenario compression is proposed to consider the timing constraints in multiple scenarios at the same time, compressing the MCMM problem into an equivalent single-corner multiple-mode (SCMM), or single-corner single-mode (SCSM) problem. The compression is performed by combining the skew constraints of the different scenarios in skew constraint graphs based on delay linearization and dominating skew constraints. An MRCT consists of several clock trees and mode separation involves, depending on the active mode, selecting one of the clock trees to deliver the clock signal. To limit the overhead, the bottom part (closer to the clock sinks) of all the different clock trees are shared and only the top part (closer to the clock source) of the clock network is mode reconfigurable. The reconfiguration is realized using OR-gates and a one-input-multiple-output demultiplexer. The experimental results show that for a set of synthesized MCMM circuits, with 715 to 13, 216 sequential elements, the proposed approach can achieve high yield.<\/jats:p>","DOI":"10.1145\/2883609","type":"journal-article","created":{"date-parts":[[2016,5,18]],"date-time":"2016-05-18T14:28:02Z","timestamp":1463581682000},"page":"1-27","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":2,"title":["Construction of Reconfigurable Clock Trees for MCMM Designs Using Mode Separation and Scenario Compression"],"prefix":"10.1145","volume":"21","author":[{"given":"Rickard","family":"Ewetz","sequence":"first","affiliation":[{"name":"Purdue University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Cheng-Kok","family":"Koh","sequence":"additional","affiliation":[{"name":"Purdue University"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2016,5,18]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.5555\/996070.1009993"},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/1960397.1960408"},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/2591513.2591541"},{"key":"e_1_2_1_4_1","first-page":"634","article-title":"Process corner estimation circuit with temperature compensation","volume":"7","author":"Chan Wai Chan","year":"2009","journal-title":"US Patent"},{"key":"e_1_2_1_5_1","unstructured":"Yong. P. Chen and D. F. Wong. 1996. An algorithm for zero-skew clock tree routing with buffer insertion. In EDTC\u201996. 230--237. Yong. P. Chen and D. F. Wong. 1996. An algorithm for zero-skew clock tree routing with buffer insertion. In EDTC\u201996. 230--237."},{"key":"e_1_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/293625.293628"},{"key":"e_1_2_1_7_1","unstructured":"Thomas H. Cormen Clifford Stein Ronald L. Rivest and Charles E. Leiserson. 2001. Introduction to Algorithms. McGraw-Hill Higher Education. Thomas H. Cormen Clifford Stein Ronald L. Rivest and Charles E. Leiserson. 2001. Introduction to Algorithms. McGraw-Hill Higher Education."},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/157485.165066"},{"key":"e_1_2_1_9_1","doi-asserted-by":"crossref","unstructured":"Rickard Ewetz Shankarshana Janarthanan and Cheng-Kok Koh. 2014. Fast clock skew scheduling based on sparse-graph algorithms. In ASP-DAC\u201914. 472--477. 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