{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,18]],"date-time":"2025-11-18T09:49:00Z","timestamp":1763459340370,"version":"3.45.0"},"reference-count":49,"publisher":"Association for Computing Machinery (ACM)","issue":"4","license":[{"start":{"date-parts":[[2017,5,27]],"date-time":"2017-05-27T00:00:00Z","timestamp":1495843200000},"content-version":"vor","delay-in-days":365,"URL":"http:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/100002418","name":"Intel Corporation","doi-asserted-by":"crossref","id":[{"id":"10.13039\/100002418","id-type":"DOI","asserted-by":"crossref"}]},{"name":"NSF","award":["CNS-1149458"],"award-info":[{"award-number":["CNS-1149458"]}]},{"DOI":"10.13039\/100000181","name":"AFOSR","doi-asserted-by":"crossref","award":["FA9550-13-1-0008"],"award-info":[{"award-number":["FA9550-13-1-0008"]}],"id":[{"id":"10.13039\/100000181","id-type":"DOI","asserted-by":"crossref"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Des. Autom. Electron. Syst."],"published-print":{"date-parts":[[2016,9,22]]},"abstract":"<jats:p>With the breakdown of Dennard\u2019s scaling over the past decade, performance growth of modern microprocessor design has largely relied on scaling core count in chip multiprocessors (CMPs). The challenge of chip power density, however, remains and demands new power management solutions. This work investigates a coordinated CMP systemwide Dynamic Voltage and Frequency Scaling (DVFS) policy centered around shared resource utilization. This approach represents a new angle on the problem, differing from the conventional core-workload-driven approaches. The key component of our work is per-core DVFS leveraging a technique similar to TCP Vegas congestion control from networking. This TCP Vegas\u2013based DVFS can potentially identify the synergy between power reduction and performance improvement. Further, this work includes uncore (on-chip interconnect and shared last level cache) and main memory DVFS policies coordinated with the per-core DVFS policy. Full system simulations on PARSEC benchmarks show that our technique reduces total energy dissipation by over 47% across all benchmarks with less than 2.3% performance degradation. Our work also leads to 12% more energy savings compared to a prior work CMP DVFS policy.<\/jats:p>","DOI":"10.1145\/2897394","type":"journal-article","created":{"date-parts":[[2016,5,31]],"date-time":"2016-05-31T08:15:09Z","timestamp":1464682509000},"page":"1-25","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":2,"title":["Resource Sharing Centric Dynamic Voltage and Frequency Scaling for CMP Cores, Uncore, and Memory"],"prefix":"10.1145","volume":"21","author":[{"given":"Jae-Yeon","family":"Won","sequence":"first","affiliation":[{"name":"Texas A&amp;M University, College Station, TX"}]},{"given":"Paul V.","family":"Gratz","sequence":"additional","affiliation":[{"name":"Texas A&amp;M University, College Station, TX"}]},{"given":"Srinivas","family":"Shakkottai","sequence":"additional","affiliation":[{"name":"Texas A&amp;M University, College Station, TX"}]},{"given":"Jiang","family":"Hu","sequence":"additional","affiliation":[{"name":"Texas A&amp;M University, College Station, TX"}]}],"member":"320","published-online":{"date-parts":[[2016,5,27]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.5555\/1643608"},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555792"},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/1454115.1454128"},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/49.464716"},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/SBAC-PAD.2012.44"},{"key":"e_1_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488874"},{"key":"e_1_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/NOCS.2012.12"},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2012.22"},{"key":"e_1_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/1950365.1950392"},{"key":"e_1_2_1_10_1","doi-asserted-by":"publisher","unstructured":"R. H. Dennard F. H. Gaensslen H.-N. Yu V. L. Rideout E. Bassous and A. R. Leblanc. 1974. Design of ion-implanted MOSFET\u2019s with very small physical dimensions. IEEE J. Solid State Circ. SC-9 5 (Oct. 1974) 256--268. 10.1109\/JSSC.1974.1050511","DOI":"10.1109\/JSSC.1974.1050511"},{"key":"e_1_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2009.2015740"},{"key":"e_1_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/1736020.1736058"},{"key":"e_1_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/1952998.1952999"},{"key":"e_1_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669149"},{"key":"e_1_2_1_15_1","article-title":"Energy-efficient computing: Power management system on the Nehalem family of processors","volume":"14","author":"Gunther S.","year":"2010","unstructured":"S. Gunther, A. Deval, T. Burton, and R. Kumar. 2010. Energy-efficient computing: Power management system on the Nehalem family of processors. Intel Technol. J. 14, 3 (2010).","journal-title":"Intel Technol. J."},{"key":"e_1_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/1283780.1283790"},{"key":"e_1_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/2396556.2396581"},{"key":"e_1_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2006.8"},{"key":"e_1_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/1006209.1006246"},{"key":"e_1_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/2333660.2333686"},{"key":"e_1_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1145\/1077603.1077637"},{"key":"e_1_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2010.2059270"},{"key":"e_1_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2010.2091686"},{"volume-title":"Proceedings of the IEEE International Symposium on High-Performance Computer Architecture. 123--134","author":"Kim W.","key":"e_1_2_1_24_1","unstructured":"W. Kim, M. S. Gupta, G. Wei, and D. Brooks. 2008. System level analysis of fast, per-core DVFS using on-chip switching regulators. In Proceedings of the IEEE International Symposium on High-Performance Computer Architecture. 123--134."},{"key":"e_1_2_1_25_1","volume-title":"Larrabee, Dunnington.","author":"Kowaliski C.","year":"2008","unstructured":"C. Kowaliski. 2008. Gelsinger reveals details of Nehalem, Larrabee, Dunnington. (2008). http:\/\/techreport.com\/news\/14361\/gelsinger-reveals-details-of-nehalem-larrabee-dunnington."},{"key":"e_1_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2009.4977306"},{"key":"e_1_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2008.31"},{"key":"e_1_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2010.18"},{"key":"e_1_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2013.52"},{"key":"e_1_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.jpdc.2010.10.013"},{"key":"e_1_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669172"},{"key":"e_1_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.1109\/DSD.2006.21"},{"key":"e_1_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1145\/506147.506152"},{"key":"e_1_2_1_34_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2009.77"},{"key":"e_1_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.1109\/L-CA.2012.25"},{"key":"e_1_2_1_36_1","unstructured":"Micron 2007. Calculating Memory System Power for DDR3. Micron."},{"key":"e_1_2_1_37_1","unstructured":"N. Muralimanohar R. Balasubramonian and N. P. Jouppi. 2009. CACTI 6.0: A Tool to Model Large Caches. Technical Report. HP Laboratories."},{"key":"e_1_2_1_38_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2008.7"},{"key":"e_1_2_1_39_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2006.24"},{"key":"e_1_2_1_40_1","doi-asserted-by":"publisher","DOI":"10.1145\/1250662.1250671"},{"key":"e_1_2_1_41_1","doi-asserted-by":"publisher","DOI":"10.1145\/1391469.1391627"},{"key":"e_1_2_1_42_1","doi-asserted-by":"publisher","DOI":"10.5555\/774861.774899"},{"key":"e_1_2_1_43_1","doi-asserted-by":"publisher","DOI":"10.1561\/9781601981035"},{"key":"e_1_2_1_44_1","doi-asserted-by":"publisher","DOI":"10.1145\/2442087.2442095"},{"key":"e_1_2_1_45_1","doi-asserted-by":"publisher","DOI":"10.1109\/IGCC.2011.6008552"},{"key":"e_1_2_1_46_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2014.6835941"},{"key":"e_1_2_1_47_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISLPED.2015.7273523"},{"key":"e_1_2_1_48_1","doi-asserted-by":"publisher","DOI":"10.1145\/1024393.1024423"},{"key":"e_1_2_1_49_1","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996798"}],"container-title":["ACM Transactions on Design Automation of Electronic Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2897394","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2897394","content-type":"application\/pdf","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2897394","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,11,18]],"date-time":"2025-11-18T09:43:32Z","timestamp":1763459012000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2897394"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,5,27]]},"references-count":49,"journal-issue":{"issue":"4","published-print":{"date-parts":[[2016,9,22]]}},"alternative-id":["10.1145\/2897394"],"URL":"https:\/\/doi.org\/10.1145\/2897394","relation":{},"ISSN":["1084-4309","1557-7309"],"issn-type":[{"type":"print","value":"1084-4309"},{"type":"electronic","value":"1557-7309"}],"subject":[],"published":{"date-parts":[[2016,5,27]]},"assertion":[{"value":"2015-08-01","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2016-02-01","order":2,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2016-05-27","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}