{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,9,25]],"date-time":"2026-09-25T23:28:26Z","timestamp":1790378906610,"version":"4.1.0"},"publisher-location":"New York, NY, USA","reference-count":17,"publisher":"ACM","license":[{"start":{"date-parts":[[2016,6,5]],"date-time":"2016-06-05T00:00:00Z","timestamp":1465084800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"name":"Singapore Ministry of Education Academic Research Fund Tier 2","award":["MOE2012-T2-1-115"],"award-info":[{"award-number":["MOE2012-T2-1-115"]}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2016,6,5]]},"DOI":"10.1145\/2897937.2898040","type":"proceedings-article","created":{"date-parts":[[2016,5,25]],"date-time":"2016-05-25T20:14:10Z","timestamp":1464207250000},"page":"1-6","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":94,"title":["Lin-analyzer"],"prefix":"10.1145","author":[{"given":"Guanwen","family":"Zhong","sequence":"first","affiliation":[{"name":"National University of Singapore"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Alok","family":"Prakash","sequence":"additional","affiliation":[{"name":"National University of Singapore"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Yun","family":"Liang","sequence":"additional","affiliation":[{"name":"Peking University, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Tulika","family":"Mitra","sequence":"additional","affiliation":[{"name":"National University of Singapore"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Smail","family":"Niar","sequence":"additional","affiliation":[{"name":"University of Valenciennes, France"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2016,6,5]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"Cadence Inc. C-to-Silicon Compiler 2015. www.cadence.com.  Cadence Inc. C-to-Silicon Compiler 2015. www.cadence.com."},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/146628.140395"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2005.862742"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/1950413.1950423"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/1146909.1147025"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.5555\/977395.977673"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/2684746.2689065"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488795"},{"key":"e_1_3_2_1_9_1","volume-title":"DATE","author":"Pham N.","year":"2015","unstructured":"Pham N. Exploiting Loop-array Dependencies to Accelerate the Design Space Exploration with High Level Synthesis . In DATE , 2015 . Pham N. et al. Exploiting Loop-array Dependencies to Accelerate the Design Space Exploration with High Level Synthesis. In DATE, 2015."},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/DSD.2013.30"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/2209291.2209302"},{"key":"e_1_3_2_1_12_1","volume-title":"Power-performance Accelerator Simulator Enabling Large Design Space Exploration of Customized Architectures. In ISCA","author":"Shao Y.","year":"2014","unstructured":"Shao Y. Aladdin: A Pre-RTL , Power-performance Accelerator Simulator Enabling Large Design Space Exploration of Customized Architectures. In ISCA , 2014 . Shao Y. et al. Aladdin: A Pre-RTL, Power-performance Accelerator Simulator Enabling Large Design Space Exploration of Customized Architectures. In ISCA, 2014."},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/512529.512550"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2014.6974719"},{"key":"e_1_3_2_1_15_1","unstructured":"Pouchet L. PolyBench\/C 3.2. http:\/\/web.cse.ohio-state.edu\/~pouchet\/software\/polybench\/.  Pouchet L. PolyBench\/C 3.2. http:\/\/web.cse.ohio-state.edu\/~pouchet\/software\/polybench\/."},{"key":"e_1_3_2_1_16_1","volume-title":"An Implementation of Swing Modulo Scheduling with Extensions for Superblocks. Master's thesis","author":"Lattner T.","year":"2005","unstructured":"Lattner T. An Implementation of Swing Modulo Scheduling with Extensions for Superblocks. Master's thesis , 2005 . Lattner T. An Implementation of Swing Modulo Scheduling with Extensions for Superblocks. Master's thesis, 2005."},{"key":"e_1_3_2_1_17_1","unstructured":"Xilinx Inc. 2015. www.xilinx.com.  Xilinx Inc. 2015. www.xilinx.com."}],"event":{"name":"DAC '16: The 53rd Annual Design Automation Conference 2016","location":"Austin Texas","acronym":"DAC '16"},"container-title":["Proceedings of the 53rd Annual Design Automation Conference"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2897937.2898040","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2897937.2898040","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T04:54:36Z","timestamp":1750222476000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2897937.2898040"}},"subtitle":["a high-level performance analysis tool for FPGA-based accelerators"],"short-title":[],"issued":{"date-parts":[[2016,6,5]]},"references-count":17,"alternative-id":["10.1145\/2897937.2898040","10.1145\/2897937"],"URL":"https:\/\/doi.org\/10.1145\/2897937.2898040","relation":{},"subject":[],"published":{"date-parts":[[2016,6,5]]},"assertion":[{"value":"2016-06-05","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}