{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:12:08Z","timestamp":1750306328620,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":15,"publisher":"ACM","license":[{"start":{"date-parts":[[2016,6,5]],"date-time":"2016-06-05T00:00:00Z","timestamp":1465084800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2016,6,5]]},"DOI":"10.1145\/2897937.2898095","type":"proceedings-article","created":{"date-parts":[[2016,5,25]],"date-time":"2016-05-25T20:14:10Z","timestamp":1464207250000},"page":"1-6","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":12,"title":["Statistical fault injection for impact-evaluation of timing errors on application performance"],"prefix":"10.1145","author":[{"given":"Jeremy","family":"Constantin","sequence":"first","affiliation":[{"name":"TCL, \u00c9cole Polytech. F\u00e9d. de Lausanne"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Zheng","family":"Wang","sequence":"additional","affiliation":[{"name":"Nanyang Technological University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Georgios","family":"Karakonstantis","sequence":"additional","affiliation":[{"name":"Queen's University Belfast"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Anupam","family":"Chattopadhyay","sequence":"additional","affiliation":[{"name":"Nanyang Technological University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Andreas","family":"Burg","sequence":"additional","affiliation":[{"name":"TCL, \u00c9cole Polytech. F\u00e9d. de Lausanne"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2016,6,5]]},"reference":[{"key":"e_1_3_2_1_1_1","first-page":"7","volume-title":"Razor: A low-power pipeline based on circuit-level timing speculation,\" in IEEE\/ACM MICRO","author":"Ernst D.","year":"2003","unstructured":"D. Ernst , \" Razor: A low-power pipeline based on circuit-level timing speculation,\" in IEEE\/ACM MICRO , pp. 7 -- 18 , Dec 2003 . D. Ernst et al., \"Razor: A low-power pipeline based on circuit-level timing speculation,\" in IEEE\/ACM MICRO, pp. 7--18, Dec 2003."},{"key":"e_1_3_2_1_2_1","first-page":"194","article-title":"A 45 nm resilient microprocessor core for dynamic variation tolerance","author":"Bowman K.","year":"2011","unstructured":"K. Bowman , \" A 45 nm resilient microprocessor core for dynamic variation tolerance ,\" IEEE JSCC , pp. 194 -- 208 , Jan. 2011 . K. Bowman et al., \"A 45 nm resilient microprocessor core for dynamic variation tolerance,\" IEEE JSCC, pp. 194--208, Jan. 2011.","journal-title":"IEEE JSCC"},{"key":"e_1_3_2_1_3_1","first-page":"111","volume-title":"Approximate computing: An integrated hardware approach,\" in IEEE Asilomar","author":"Chippa V.","year":"2013","unstructured":"V. Chippa , \" Approximate computing: An integrated hardware approach,\" in IEEE Asilomar , pp. 111 -- 117 , Nov 2013 . V. Chippa et al., \"Approximate computing: An integrated hardware approach,\" in IEEE Asilomar, pp. 111--117, Nov 2013."},{"key":"e_1_3_2_1_4_1","first-page":"32","volume-title":"VERIFY: Evaluation of reliability using vhdl-models with embedded fault descriptions,\" in Fault-Tolerant Computing","author":"Sieh V.","year":"1997","unstructured":"V. Sieh , \" VERIFY: Evaluation of reliability using vhdl-models with embedded fault descriptions,\" in Fault-Tolerant Computing , pp. 32 -- 36 , IEEE , 1997 . V. Sieh et al., \"VERIFY: Evaluation of reliability using vhdl-models with embedded fault descriptions,\" in Fault-Tolerant Computing, pp. 32--36, IEEE, 1997."},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_5_1","DOI":"10.1109\/SSIRI.2009.38"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_6_1","DOI":"10.1109\/ISQED.2006.16"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_7_1","DOI":"10.1145\/2463209.2488859"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_8_1","DOI":"10.1109\/2.386985"},{"key":"e_1_3_2_1_9_1","volume-title":"Detecting soft errors by a purely software approach: Method, tools and experimental results,\" in IEEE DATE","author":"Nicolescu B.","year":"2003","unstructured":"B. Nicolescu , \" Detecting soft errors by a purely software approach: Method, tools and experimental results,\" in IEEE DATE , IEEE Computer Society , 2003 . B. Nicolescu et al., \"Detecting soft errors by a purely software approach: Method, tools and experimental results,\" in IEEE DATE, IEEE Computer Society, 2003."},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_10_1","DOI":"10.1145\/1815961.1816026"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_11_1","DOI":"10.1145\/1669112.1669129"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_12_1","DOI":"10.1109\/DSN.2014.2"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_13_1","DOI":"10.1145\/2656342"},{"key":"e_1_3_2_1_14_1","first-page":"381","volume-title":"Exploiting dynamic timing margins in microprocessors for frequency-over-scaling with instruction-based clock adjustment,\" in IEEE DATE","author":"Constantin J.","year":"2015","unstructured":"J. Constantin , \" Exploiting dynamic timing margins in microprocessors for frequency-over-scaling with instruction-based clock adjustment,\" in IEEE DATE , pp. 381 -- 386 , Mar 2015 . J. Constantin et al., \"Exploiting dynamic timing margins in microprocessors for frequency-over-scaling with instruction-based clock adjustment,\" in IEEE DATE, pp. 381--386, Mar 2015."},{"key":"e_1_3_2_1_15_1","first-page":"265","volume-title":"Fast reliability exploration for embedded processors via high-level fault injection,\" in IEEE ISQED","author":"Wang Z.","year":"2013","unstructured":"Z. Wang , \" Fast reliability exploration for embedded processors via high-level fault injection,\" in IEEE ISQED , pp. 265 -- 272 , Mar 2013 . Z. Wang et al., \"Fast reliability exploration for embedded processors via high-level fault injection,\" in IEEE ISQED, pp. 265--272, Mar 2013."}],"event":{"acronym":"DAC '16","name":"DAC '16: The 53rd Annual Design Automation Conference 2016","location":"Austin Texas"},"container-title":["Proceedings of the 53rd Annual Design Automation Conference"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2897937.2898095","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2897937.2898095","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T04:54:36Z","timestamp":1750222476000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2897937.2898095"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,6,5]]},"references-count":15,"alternative-id":["10.1145\/2897937.2898095","10.1145\/2897937"],"URL":"https:\/\/doi.org\/10.1145\/2897937.2898095","relation":{},"subject":[],"published":{"date-parts":[[2016,6,5]]},"assertion":[{"value":"2016-06-05","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}