{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,8]],"date-time":"2026-01-08T04:10:46Z","timestamp":1767845446805,"version":"3.49.0"},"publisher-location":"New York, NY, USA","reference-count":91,"publisher":"ACM","license":[{"start":{"date-parts":[[2016,6,5]],"date-time":"2016-06-05T00:00:00Z","timestamp":1465084800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2016,6,5]]},"DOI":"10.1145\/2897937.2905022","type":"proceedings-article","created":{"date-parts":[[2016,5,25]],"date-time":"2016-05-25T20:14:10Z","timestamp":1464207250000},"page":"1-5","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":27,"title":["Invited - Who is the major threat to tomorrow's security?"],"prefix":"10.1145","author":[{"given":"Wayne","family":"Burleson","sequence":"first","affiliation":[{"name":"University of Massachusetts, Amherst"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Onur","family":"Mutlu","sequence":"additional","affiliation":[{"name":"Carnegie Mellon University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mohit","family":"Tiwari","sequence":"additional","affiliation":[{"name":"University of Texas Austin"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2016,6,5]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"RowHammer Discussion Group. https:\/\/groups.google.com\/forum\/#!forum\/rowhammer-discuss.  RowHammer Discussion Group. https:\/\/groups.google.com\/forum\/#!forum\/rowhammer-discuss."},{"key":"e_1_3_2_1_2_1","unstructured":"RowHammer on Twitter. https:\/\/twitter.com\/search?q=rowhammer&src=typd.  RowHammer on Twitter. https:\/\/twitter.com\/search?q=rowhammer&src=typd."},{"key":"e_1_3_2_1_3_1","unstructured":"B. Aichinger. The Known Failure Mechanism in DDR3 Memory referred to as Row Hammer. http:\/\/ddrdetective.com\/files\/6414\/1036\/5710\/The_Known_Failure_Mechanism_in_DDR3_memory_referred_to_as_Row_Hammer.pdf September 2014.  B. Aichinger. The Known Failure Mechanism in DDR3 Memory referred to as Row Hammer. http:\/\/ddrdetective.com\/files\/6414\/1036\/5710\/The_Known_Failure_Mechanism_in_DDR3_memory_referred_to_as_Row_Hammer.pdf September 2014."},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2015.44"},{"key":"e_1_3_2_1_5_1","volume-title":"June","author":"Apple Inc.","year":"2015","unstructured":"Apple Inc. About the security content of Mac EFI Security Update 2015-001. https:\/\/support.apple.com\/en-us\/HT204934 , June 2015 . Apple Inc. About the security content of Mac EFI Security Update 2015-001. https:\/\/support.apple.com\/en-us\/HT204934, June 2015."},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/2872362.2872390"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2011.6081414"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-40349-1_12"},{"key":"e_1_3_2_1_9_1","volume-title":"Cache-timing Attacks on AES","author":"Bernstein D. J.","year":"2005","unstructured":"D. J. Bernstein . Cache-timing Attacks on AES , 2005 . D. J. Bernstein. Cache-timing Attacks on AES, 2005."},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.5555\/1251353.1251354"},{"key":"e_1_3_2_1_11_1","volume-title":"DATE","author":"Cai Y.","year":"2012","unstructured":"Y. Cai , E. F. Haratsch , O. Mutlu , and K. Mai . Error patterns in MLC NAND flash memory: Measurement, characterization, and analysis . In DATE , 2012 . Y. Cai, E. F. Haratsch, O. Mutlu, and K. Mai. Error patterns in MLC NAND flash memory: Measurement, characterization, and analysis. In DATE, 2012."},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.5555\/2485288.2485597"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2015.49"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2015.7056062"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2013.6657034"},{"key":"e_1_3_2_1_16_1","author":"Cai Y.","year":"2013","unstructured":"Y. Cai , G. Yalcin , O. Mutlu , E. F. Haratsch , A. Cristal , O. Unsal , and K. Mai . Error Analysis and Retention-Aware Error Management for NAND Flash Memory. Intel Technology Journal, Special Issue on Memory Resiliency , May 2013 . Y. Cai, G. Yalcin, O. Mutlu, E. F. Haratsch, A. Cristal, O. Unsal, and K. Mai. Error Analysis and Retention-Aware Error Management for NAND Flash Memory. Intel Technology Journal, Special Issue on Memory Resiliency, May 2013.","journal-title":"Intel Technology Journal, Special Issue on Memory Resiliency"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2012.6378623"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/2591971.2591994"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2014.39"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.5555\/2616606.2616820"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2014.6835946"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1145\/2896377.2901453"},{"issue":"6","key":"e_1_3_2_1_23_1","volume":"46","author":"E. Chen","year":"2010","unstructured":"E. Chen et al. Advances and Future Prospects of Spin-Transfer Torque Random Access Memory. IEEE Transactions on Magnetics , 46 ( 6 ), 2010 . E. Chen et al. Advances and Future Prospects of Spin-Transfer Torque Random Access Memory. IEEE Transactions on Magnetics, 46(6), 2010.","journal-title":"IEEE Transactions on Magnetics"},{"key":"e_1_3_2_1_24_1","unstructured":"CHES. Conference on Cryptographic Hardware and Embedded Systems. http:\/\/www.chesworkshop.org.  CHES. Conference on Cryptographic Hardware and Embedded Systems. http:\/\/www.chesworkshop.org."},{"key":"e_1_3_2_1_25_1","volume-title":"Automation Conference. https:\/\/dac.com\/.","author":"Design DAC.","unstructured":"DAC. Design Automation Conference. https:\/\/dac.com\/. DAC. Design Automation Conference. https:\/\/dac.com\/."},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1145\/2382536.2382540"},{"key":"e_1_3_2_1_27_1","unstructured":"T. Fridley and O. Santos. Mitigations Available for the DRAM Row Hammer Vulnerability. http:\/\/blogs.cisco.com\/security\/mitigations-available-for-the-dram-row-hammer-vulnerability March 2015.  T. Fridley and O. Santos. Mitigations Available for the DRAM Row Hammer Vulnerability. http:\/\/blogs.cisco.com\/security\/mitigations-available-for-the-dram-row-hammer-vulnerability March 2015."},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-14423-3_13"},{"key":"e_1_3_2_1_29_1","volume-title":"Rowhammer.js: A remote software-induced fault attack in javascript. CoRR, abs\/1507.06955","author":"Gruss D.","year":"2015","unstructured":"D. Gruss , C. Maurice , and S. Mangard . Rowhammer.js: A remote software-induced fault attack in javascript. CoRR, abs\/1507.06955 , 2015 . D. Gruss, C. Maurice, and S. Mangard. Rowhammer.js: A remote software-induced fault attack in javascript. CoRR, abs\/1507.06955, 2015."},{"key":"e_1_3_2_1_30_1","volume-title":"December","author":"Harris R.","year":"2014","unstructured":"R. Harris . Flipping DRAM bits - maliciously. http:\/\/www.zdnet.com\/article\/ipping-dram-bits-maliciously\/ , December 2014 . R. Harris. Flipping DRAM bits - maliciously. http:\/\/www.zdnet.com\/article\/ipping-dram-bits-maliciously\/, December 2014."},{"key":"e_1_3_2_1_31_1","volume-title":"HP Moonshot Component Pack Version","author":"Enterprise Hewlett-Packard","year":"2015","unstructured":"Hewlett-Packard Enterprise . HP Moonshot Component Pack Version 2015 .05.0. http:\/\/h17007.www1.hp.com\/us\/en\/enterprise\/servers\/products\/moonshot\/component-pack\/index.aspx, 2015. Hewlett-Packard Enterprise. HP Moonshot Component Pack Version 2015.05.0. http:\/\/h17007.www1.hp.com\/us\/en\/enterprise\/servers\/products\/moonshot\/component-pack\/index.aspx, 2015."},{"key":"e_1_3_2_1_32_1","volume-title":"IEEE International Symposium on Hardware Oriented Security and Trust. http:\/\/www.hostsymposium.org\/.","author":"HOST.","unstructured":"HOST. IEEE International Symposium on Hardware Oriented Security and Trust. http:\/\/www.hostsymposium.org\/. HOST. IEEE International Symposium on Hardware Oriented Security and Trust. http:\/\/www.hostsymposium.org\/."},{"key":"e_1_3_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2015.7056069"},{"key":"e_1_3_2_1_34_1","volume-title":"Symposium on Computer Architecture. http:\/\/isca2016","author":"International ISCA.","unstructured":"ISCA. International Symposium on Computer Architecture. http:\/\/isca2016 .eecs.umich.edu\/. ISCA. International Symposium on Computer Architecture. http:\/\/isca2016.eecs.umich.edu\/."},{"key":"e_1_3_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2012.19"},{"key":"e_1_3_2_1_36_1","volume-title":"The Memory Forum (ISCA)","author":"Kang U.","year":"2014","unstructured":"U. Kang , H. Yu , C. Park , H. Zheng , J. Halbert , K. Bains , S. Jang , and J. S. Choi . Co-Architecting Controllers and DRAM to Enhance DRAM Process Scaling . In The Memory Forum (ISCA) , 2014 . U. Kang, H. Yu, C. Park, H. Zheng, J. Halbert, K. Bains, S. Jang, and J. S. Choi. Co-Architecting Controllers and DRAM to Enhance DRAM Process Scaling. In The Memory Forum (ISCA), 2014."},{"key":"e_1_3_2_1_37_1","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2010.299"},{"key":"e_1_3_2_1_38_1","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2016.30"},{"key":"e_1_3_2_1_39_1","doi-asserted-by":"publisher","DOI":"10.1145\/2591971.2592000"},{"key":"e_1_3_2_1_40_1","volume-title":"Feb.","author":"Kim Y.","year":"2016","unstructured":"Y. Kim , R. Daly , J. Kim , C. Fallin , J. Hye Lee , D. Lee , C. Wilkerson , K. Lai , and O. Mutlu . RowHammer: Reliability Analysis and Security Implications. CoRR, abs\/1603.00747 , Feb. 2016 . Y. Kim, R. Daly, J. Kim, C. Fallin, J. Hye Lee, D. Lee, C. Wilkerson, K. Lai, and O. Mutlu. RowHammer: Reliability Analysis and Security Implications. CoRR, abs\/1603.00747, Feb. 2016."},{"key":"e_1_3_2_1_41_1","volume-title":"ISCA","author":"Kim Y.","year":"2014","unstructured":"Y. Kim , R. Daly , J. Kim , C. Fallin , J. Lee , D. Lee , C. Wilkerson , K. Lai , and O. Mutlu . Flipping bits in memory without accessing them: An experimental study of DRAM disturbance errors . In ISCA , 2014 . Y. Kim, R. Daly, J. Kim, C. Fallin, J. Lee, D. Lee, C. Wilkerson, K. Lai, and O. Mutlu. Flipping bits in memory without accessing them: An experimental study of DRAM disturbance errors. In ISCA, 2014."},{"key":"e_1_3_2_1_42_1","volume-title":"Advances in Cryptology","author":"Kocher P.","year":"1999","unstructured":"P. Kocher , J. Jaffe , and B. Jun . Differential power analysis . In Advances in Cryptology , 1999 . P. Kocher, J. Jaffe, and B. Jun. Differential power analysis. In Advances in Cryptology, 1999."},{"key":"e_1_3_2_1_43_1","volume-title":"Dec. 4","author":"Kocher P.","year":"2001","unstructured":"P. Kocher , J. Jaffe , and B. Jun . Using unpredictable information to minimize leakage from smartcards and other cryptosystems , Dec. 4 2001 . US Patent 6,327,661. P. Kocher, J. Jaffe, and B. Jun. Using unpredictable information to minimize leakage from smartcards and other cryptosystems, Dec. 4 2001. US Patent 6,327,661."},{"key":"e_1_3_2_1_44_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2013.6557176"},{"key":"e_1_3_2_1_45_1","unstructured":"M. Lanteigne. How Rowhammer Could Be Used to Exploit Weaknesses in Computer Hardware. http:\/\/www.thirdio.com\/rowhammer.pdf March 2016.  M. Lanteigne. How Rowhammer Could Be Used to Exploit Weaknesses in Computer Hardware. http:\/\/www.thirdio.com\/rowhammer.pdf March 2016."},{"key":"e_1_3_2_1_46_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555758"},{"key":"e_1_3_2_1_47_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2010.24"},{"key":"e_1_3_2_1_48_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2015.7056057"},{"key":"e_1_3_2_1_49_1","volume-title":"March","year":"2015","unstructured":"Lenovo. Row Hammer Privilege Escalation. https:\/\/support.lenovo.com\/us\/en\/product_security\/row_hammer , March 2015 . Lenovo. Row Hammer Privilege Escalation. https:\/\/support.lenovo.com\/us\/en\/product_security\/row_hammer, March 2015."},{"key":"e_1_3_2_1_50_1","doi-asserted-by":"publisher","DOI":"10.1109\/WMWA.2009.46"},{"key":"e_1_3_2_1_51_1","doi-asserted-by":"publisher","DOI":"10.1145\/1629911.1629977"},{"key":"e_1_3_2_1_52_1","doi-asserted-by":"publisher","DOI":"10.1145\/1687399.1687425"},{"key":"e_1_3_2_1_53_1","doi-asserted-by":"publisher","DOI":"10.1145\/2485922.2485928"},{"key":"e_1_3_2_1_54_1","volume-title":"ISCA","author":"Liu J.","year":"2012","unstructured":"J. Liu , B. Jaiyen , R. Veras , and O. Mutlu . RAIDR: Retention-Aware Intelligent DRAM Refresh . In ISCA , 2012 . J. Liu, B. Jaiyen, R. Veras, and O. Mutlu. RAIDR: Retention-Aware Intelligent DRAM Refresh. In ISCA, 2012."},{"key":"e_1_3_2_1_55_1","doi-asserted-by":"publisher","DOI":"10.1109\/MSST.2015.7208284"},{"key":"e_1_3_2_1_56_1","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2014.50"},{"key":"e_1_3_2_1_57_1","doi-asserted-by":"publisher","DOI":"10.1145\/2508859.2516692"},{"key":"e_1_3_2_1_58_1","doi-asserted-by":"publisher","DOI":"10.1147\/rd.462.0187"},{"key":"e_1_3_2_1_59_1","volume-title":"ICISC","author":"Mangard S.","year":"2003","unstructured":"S. Mangard . A simple power-analysis (spa) attack on implementations of the aes key expansion . In ICISC , 2003 . S. Mangard. A simple power-analysis (spa) attack on implementations of the aes key expansion. In ICISC, 2003."},{"key":"e_1_3_2_1_60_1","volume-title":"USENIX Security Symposium","author":"Masti R. J.","year":"2015","unstructured":"R. J. Masti , D. Rai , A. Ranganathan , C. M\u00fcller , L. Thiele , and S. Capkun . Thermal covert channels on multi-core platforms . In USENIX Security Symposium , 2015 . R. J. Masti, D. Rai, A. Ranganathan, C. M\u00fcller, L. Thiele, and S. Capkun. Thermal covert channels on multi-core platforms. In USENIX Security Symposium, 2015."},{"key":"e_1_3_2_1_61_1","volume-title":"WEED","author":"Meza J.","year":"2013","unstructured":"J. Meza , Y. Luo , S. Khan , J. Zhao , Y. Xie , and O. Mutlu . A Case for Efficient Hardware-Software Cooperative Management of Storage and Memory . In WEED , 2013 . J. Meza, Y. Luo, S. Khan, J. Zhao, Y. Xie, and O. Mutlu. A Case for Efficient Hardware-Software Cooperative Management of Storage and Memory. In WEED, 2013."},{"key":"e_1_3_2_1_62_1","doi-asserted-by":"publisher","DOI":"10.1145\/2745844.2745848"},{"key":"e_1_3_2_1_63_1","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2015.57"},{"key":"e_1_3_2_1_64_1","volume-title":"International Symposium on Microarchitecture. http:\/\/www.microarch.org\/.","author":"MICRO.","unstructured":"MICRO. International Symposium on Microarchitecture. http:\/\/www.microarch.org\/. MICRO. International Symposium on Microarchitecture. http:\/\/www.microarch.org\/."},{"key":"e_1_3_2_1_65_1","volume-title":"IMW","author":"Mutlu O.","year":"2013","unstructured":"O. Mutlu . Memory Scaling : A Systems Architecture Perspective . In IMW , 2013 . O. Mutlu. Memory Scaling: A Systems Architecture Perspective. In IMW, 2013."},{"key":"e_1_3_2_1_66_1","volume-title":"Flash Memory Summit","author":"Mutlu O.","year":"2014","unstructured":"O. Mutlu . Error Analysis and Management for MLC NAND Flash Memory . In Flash Memory Summit , 2014 . O. Mutlu. Error Analysis and Management for MLC NAND Flash Memory. In Flash Memory Summit, 2014."},{"key":"e_1_3_2_1_67_1","volume-title":"Supercomputing Frontiers and Innovations","author":"Mutlu O.","year":"2015","unstructured":"O. Mutlu and L. Subramanian . Research problems and opportunities in memory systems . Supercomputing Frontiers and Innovations , 2015 . O. Mutlu and L. Subramanian. Research problems and opportunities in memory systems. Supercomputing Frontiers and Innovations, 2015."},{"key":"e_1_3_2_1_68_1","unstructured":"PassMark Software. MemTest86: The original industry standard memory diagnostic utility. http:\/\/www.memtest86.com\/troubleshooting.htm 2015.  PassMark Software. MemTest86: The original industry standard memory diagnostic utility. http:\/\/www.memtest86.com\/troubleshooting.htm 2015."},{"key":"e_1_3_2_1_69_1","volume-title":"BSDCon","author":"Percival C.","year":"2005","unstructured":"C. Percival . Cache Missing for Fun and Profit . In BSDCon , 2005 . C. Percival. Cache Missing for Fun and Profit. In BSDCon, 2005."},{"key":"e_1_3_2_1_70_1","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2015.58"},{"key":"e_1_3_2_1_71_1","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669117"},{"key":"e_1_3_2_1_72_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555760"},{"key":"e_1_3_2_1_73_1","doi-asserted-by":"publisher","DOI":"10.1147\/rd.524.0465"},{"key":"e_1_3_2_1_74_1","doi-asserted-by":"publisher","DOI":"10.1109\/TIFS.2013.2279798"},{"key":"e_1_3_2_1_75_1","volume-title":"Power and Timing Side Channels for PUFs and their Efficient Exploitation. IACR Cryptology ePrint Archive","author":"R\u00fchrmair U.","year":"2013","unstructured":"U. R\u00fchrmair , X. Xu , J. S\u00f6lter , A. Mahmoud , F. Koushanfar , and W. Burleson . Power and Timing Side Channels for PUFs and their Efficient Exploitation. IACR Cryptology ePrint Archive , 2013 . U. R\u00fchrmair, X. Xu, J. S\u00f6lter, A. Mahmoud, F. Koushanfar, and W. Burleson. Power and Timing Side Channels for PUFs and their Efficient Exploitation. IACR Cryptology ePrint Archive, 2013."},{"key":"e_1_3_2_1_76_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-662-44709-3_26"},{"key":"e_1_3_2_1_77_1","doi-asserted-by":"publisher","DOI":"10.5555\/648253.752399"},{"key":"e_1_3_2_1_78_1","volume-title":"USENIX FAST","author":"Schroeder B.","year":"2016","unstructured":"B. Schroeder , R. Lagisetty , and A. Merchant . Flash Reliability in Production: The Expected and the Unexpected . In USENIX FAST , 2016 . B. Schroeder, R. Lagisetty, and A. Merchant. Flash Reliability in Production: The Expected and the Unexpected. In USENIX FAST, 2016."},{"key":"e_1_3_2_1_79_1","unstructured":"M. Seaborn. Exploiting the DRAM rowhammer bug to gain kernel privileges. http:\/\/googleprojectzero.blogspot.com.tr\/2015\/03\/exploiting-dram-rowhammer-bug-to-gain.html.  M. Seaborn. Exploiting the DRAM rowhammer bug to gain kernel privileges. http:\/\/googleprojectzero.blogspot.com.tr\/2015\/03\/exploiting-dram-rowhammer-bug-to-gain.html."},{"key":"e_1_3_2_1_80_1","doi-asserted-by":"publisher","DOI":"10.1145\/2694344.2694348"},{"key":"e_1_3_2_1_81_1","doi-asserted-by":"publisher","DOI":"10.5555\/2388996.2389100"},{"key":"e_1_3_2_1_82_1","doi-asserted-by":"publisher","DOI":"10.1145\/2503210.2503257"},{"key":"e_1_3_2_1_83_1","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2010.5513099"},{"key":"e_1_3_2_1_84_1","volume-title":"ESSCIRC","author":"Tiri K.","year":"2002","unstructured":"K. Tiri , M. Akmal , and I. Verbauwhede . A dynamic and differential cmos logic with signal independent power consumption to withstand differential power analysis on smart cards . In ESSCIRC , 2002 . K. Tiri, M. Akmal, and I. Verbauwhede. A dynamic and differential cmos logic with signal independent power consumption to withstand differential power analysis on smart cards. In ESSCIRC, 2002."},{"key":"e_1_3_2_1_85_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2014.6835934"},{"key":"e_1_3_2_1_86_1","unstructured":"Wikipedia. Row hammer. https:\/\/en.wikipedia.org\/wiki\/Row hammer.  Wikipedia. Row hammer. https:\/\/en.wikipedia.org\/wiki\/Row hammer."},{"key":"e_1_3_2_1_87_1","volume-title":"Proceedings of the IEEE","author":"H.-S.","year":"2010","unstructured":"H.-S. P. Wong et al . Phase Change Memory. Proceedings of the IEEE , 2010 . H.-S. P. Wong et al. Phase Change Memory. Proceedings of the IEEE, 2010."},{"key":"e_1_3_2_1_88_1","volume-title":"Metal-oxide RRAM. Proceedings of the IEEE","author":"H.-S.","year":"2012","unstructured":"H.-S. P. Wong et al . Metal-oxide RRAM. Proceedings of the IEEE , 2012 . H.-S. P. Wong et al. Metal-oxide RRAM. Proceedings of the IEEE, 2012."},{"key":"e_1_3_2_1_89_1","doi-asserted-by":"publisher","DOI":"10.5555\/2616606.2617100"},{"key":"e_1_3_2_1_90_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2014.80"},{"key":"e_1_3_2_1_91_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555759"}],"event":{"name":"DAC '16: The 53rd Annual Design Automation Conference 2016","location":"Austin Texas","acronym":"DAC '16"},"container-title":["Proceedings of the 53rd Annual Design Automation Conference"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2897937.2905022","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2897937.2905022","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T04:54:37Z","timestamp":1750222477000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2897937.2905022"}},"subtitle":["you, the hardware designer"],"short-title":[],"issued":{"date-parts":[[2016,6,5]]},"references-count":91,"alternative-id":["10.1145\/2897937.2905022","10.1145\/2897937"],"URL":"https:\/\/doi.org\/10.1145\/2897937.2905022","relation":{},"subject":[],"published":{"date-parts":[[2016,6,5]]},"assertion":[{"value":"2016-06-05","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}