{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:11:29Z","timestamp":1750306289636,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":27,"publisher":"ACM","license":[{"start":{"date-parts":[[2016,5,18]],"date-time":"2016-05-18T00:00:00Z","timestamp":1463529600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"name":"Samsung Global Outreach Research Program"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2016,5,18]]},"DOI":"10.1145\/2902961.2903015","type":"proceedings-article","created":{"date-parts":[[2016,5,13]],"date-time":"2016-05-13T18:21:10Z","timestamp":1463163670000},"page":"163-168","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":1,"title":["Multiple Attempt Write Strategy for Low Energy STT-RAM"],"prefix":"10.1145","author":[{"given":"Jaeyoung","family":"Park","sequence":"first","affiliation":[{"name":"The University of Texas at Austin, Austin, TX, USA"}]},{"given":"Michael","family":"Orshansky","sequence":"additional","affiliation":[{"name":"The University of Texas at Austin, Austin, TX, USA"}]}],"member":"320","published-online":{"date-parts":[[2016,5,18]]},"reference":[{"key":"e_1_3_2_1_1_1","volume-title":"Delivering on the promise of universal memory for spin-transfer torque ram,\" in ISLPED","author":"Nigam A.","year":"2011","unstructured":"A. Nigam , \" Delivering on the promise of universal memory for spin-transfer torque ram,\" in ISLPED , 2011 . A. Nigam et al., \"Delivering on the promise of universal memory for spin-transfer torque ram,\" in ISLPED, 2011."},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_2_1","DOI":"10.1147\/rd.524.0439"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_3_1","DOI":"10.1088\/0953-8984\/19\/16\/165209"},{"key":"e_1_3_2_1_4_1","article-title":"Thermal fluctuation effects on spin torque induced switching: Mean and variations","author":"Wang X.","year":"2008","unstructured":". X. Wang , \" Thermal fluctuation effects on spin torque induced switching: Mean and variations ,\" Journal of Applied Physics , 2008 . .X. Wang et al., \"Thermal fluctuation effects on spin torque induced switching: Mean and variations,\" Journal of Applied Physics, 2008.","journal-title":"Journal of Applied Physics"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_5_1","DOI":"10.1145\/1687399.1687448"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_6_1","DOI":"10.1145\/2429384.2429401"},{"key":"e_1_3_2_1_7_1","volume-title":"Variable-energy write stt-ram architecture with bit-wise write-completion monitoring,\" in ISLPED","author":"Zheng T.","year":"2013","unstructured":"T. Zheng , \" Variable-energy write stt-ram architecture with bit-wise write-completion monitoring,\" in ISLPED , 2013 . T. Zheng et al., \"Variable-energy write stt-ram architecture with bit-wise write-completion monitoring,\" in ISLPED, 2013."},{"key":"e_1_3_2_1_8_1","article-title":"Variation-tolerant write completion circuit for variable-energy write stt-ram architecture","author":"Park J.","year":"2015","unstructured":"J. Park , \" Variation-tolerant write completion circuit for variable-energy write stt-ram architecture ,\" IEEE Trans. of VLSI , 2015 . J. Park et al., \"Variation-tolerant write completion circuit for variable-energy write stt-ram architecture,\" IEEE Trans. of VLSI, 2015.","journal-title":"IEEE Trans. of VLSI"},{"key":"e_1_3_2_1_9_1","volume-title":"Low-current probabilistic writes for power-efficient stt-ram caches,\" in ICCD","author":"Strikos N.","year":"2013","unstructured":"N. Strikos , \" Low-current probabilistic writes for power-efficient stt-ram caches,\" in ICCD , 2013 . N. Strikos et al., \"Low-current probabilistic writes for power-efficient stt-ram caches,\" in ICCD, 2013."},{"key":"e_1_3_2_1_10_1","volume-title":"A novel nonvolatile memory with spin torque transfer magnetization switching: Spin-ram,\" in IEDM","author":"Hosomi M.","year":"2005","unstructured":"M. Hosomi , \" A novel nonvolatile memory with spin torque transfer magnetization switching: Spin-ram,\" in IEDM , 2005 . M. Hosomi et al., \"A novel nonvolatile memory with spin torque transfer magnetization switching: Spin-ram,\" in IEDM, 2005."},{"key":"e_1_3_2_1_11_1","volume-title":"An overview of non-volatile memory technology and the implication for tools and architectures,\" in DATE","author":"Li H.","year":"2009","unstructured":"H. Li , \" An overview of non-volatile memory technology and the implication for tools and architectures,\" in DATE , 2009 . H. Li et al., \"An overview of non-volatile memory technology and the implication for tools and architectures,\" in DATE, 2009."},{"key":"e_1_3_2_1_12_1","article-title":"A 130 nm 1.2 v\/3.3 v 16 kb spin-transfer torque random access memory with nondestructive self-reference sensing scheme","author":"Chen Y.","year":"2012","unstructured":"Y. Chen , \" A 130 nm 1.2 v\/3.3 v 16 kb spin-transfer torque random access memory with nondestructive self-reference sensing scheme ,\" IEEE J. of Solid-State Circuits , 2012 . Y. Chen et al., \"A 130 nm 1.2 v\/3.3 v 16 kb spin-transfer torque random access memory with nondestructive self-reference sensing scheme,\" IEEE J. of Solid-State Circuits, 2012.","journal-title":"IEEE J. of Solid-State Circuits"},{"key":"e_1_3_2_1_13_1","article-title":"Basic principles of stt-mram cell operation in memory arrays","author":"Khvalkovskiy A.","year":"2013","unstructured":"A. Khvalkovskiy , \" Basic principles of stt-mram cell operation in memory arrays ,\" Journal of Physics D: Applied Physics , 2013 . A. Khvalkovskiy et al., \"Basic principles of stt-mram cell operation in memory arrays,\" Journal of Physics D: Applied Physics, 2013.","journal-title":"Journal of Physics D: Applied Physics"},{"key":"e_1_3_2_1_14_1","volume-title":"Extended scalability of perpendicular stt-mram towards sub-20nm mtj node,\" in IEDM","author":"Kim W.","year":"2011","unstructured":"W. Kim , \" Extended scalability of perpendicular stt-mram towards sub-20nm mtj node,\" in IEDM , 2011 . W. Kim et al., \"Extended scalability of perpendicular stt-mram towards sub-20nm mtj node,\" in IEDM, 2011."},{"key":"e_1_3_2_1_15_1","article-title":"Compact modeling of perpendicular-anisotropy cofeb\/mgo magnetic tunnel junctions","author":"Zhang Y.","year":"2012","unstructured":"Y. Zhang , \" Compact modeling of perpendicular-anisotropy cofeb\/mgo magnetic tunnel junctions ,\" IEEE Trans. Electron Devices , 2012 . Y. Zhang et al., \"Compact modeling of perpendicular-anisotropy cofeb\/mgo magnetic tunnel junctions,\" IEEE Trans. Electron Devices, 2012.","journal-title":"IEEE Trans. Electron Devices"},{"volume-title":"version 1.0, interagency report nistir 6376, national institute of standard and technology, gaithersburg, md","year":"1999","unstructured":"\"Oommf user guide , version 1.0, interagency report nistir 6376, national institute of standard and technology, gaithersburg, md , 1999 ,\" URL : http:\/\/math. nist. gov\/oommf, 1999. \"Oommf user guide, version 1.0, interagency report nistir 6376, national institute of standard and technology, gaithersburg, md, 1999,\" URL: http:\/\/math. nist. gov\/oommf, 1999.","key":"e_1_3_2_1_16_1"},{"key":"e_1_3_2_1_17_1","volume-title":"Anomalous rotational damping in ferromagnetic sheets,\" in Conference on Magnetism and Magnetic Materials","author":"Gilbert T.","year":"1955","unstructured":"T. Gilbert , \" Anomalous rotational damping in ferromagnetic sheets,\" in Conference on Magnetism and Magnetic Materials , 1955 . T. Gilbert et al., \"Anomalous rotational damping in ferromagnetic sheets,\" in Conference on Magnetism and Magnetic Materials, 1955."},{"key":"e_1_3_2_1_18_1","volume-title":"Digest","author":"Sato H.","year":"2013","unstructured":"H. Sato study of cofeb-mgo magnetic tunnel junction characteristics with single-and double-interface scaling down to 1x nm,\" IEDM Tech . Digest , 2013 H. Sato et al., \"Comprehensive study of cofeb-mgo magnetic tunnel junction characteristics with single-and double-interface scaling down to 1x nm,\" IEDM Tech. Digest, 2013"},{"key":"e_1_3_2_1_19_1","volume-title":"Simulating with SPICE. Intusoft","author":"Meares L.","year":"1988","unstructured":"L. Meares , Simulating with SPICE. Intusoft , 1988 . L. Meares et al., Simulating with SPICE. Intusoft, 1988."},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_20_1","DOI":"10.1016\/S0167-8191(05)80033-X"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_21_1","DOI":"10.1145\/1186736.1186737"},{"key":"e_1_3_2_1_22_1","volume-title":"Predictive technology model for nano-cmos design exploration","author":"Zhao W.","year":"2010","unstructured":"W. Zhao , \" Predictive technology model for nano-cmos design exploration ,\" 2010 . W. Zhao et al., \"Predictive technology model for nano-cmos design exploration,\" 2010."},{"key":"e_1_3_2_1_23_1","volume-title":"Probability, random variables, and stochastic processes","author":"Papoulis A.","year":"2002","unstructured":"A. Papoulis , Probability, random variables, and stochastic processes . McGraw-Hill Education , 2002 . A. Papoulis et al., Probability, random variables, and stochastic processes. McGraw-Hill Education, 2002."},{"key":"e_1_3_2_1_24_1","volume-title":"Switching distributions and write reliability of perpendicular spin torque mram,\" in IEDM","author":"Worledge D.","year":"2010","unstructured":"D. Worledge , \" Switching distributions and write reliability of perpendicular spin torque mram,\" in IEDM , 2010 . D. Worledge et al., \"Switching distributions and write reliability of perpendicular spin torque mram,\" in IEDM, 2010."},{"key":"e_1_3_2_1_25_1","volume-title":"Computer Architecture and Organization: Design Principles and Applications","author":"Govindarajalu B.","year":"2004","unstructured":"B. Govindarajalu , Computer Architecture and Organization: Design Principles and Applications . McGraw-Hill , 2004 . B. Govindarajalu, Computer Architecture and Organization: Design Principles and Applications. McGraw-Hill, 2004."},{"key":"e_1_3_2_1_26_1","volume-title":"A novel architecture of the 3d stacked mram l2 cache for cmps,\" in HPCA","author":"Sun G.","year":"2009","unstructured":"G. Sun , \" A novel architecture of the 3d stacked mram l2 cache for cmps,\" in HPCA , 2009 . G. Sun et al., \"A novel architecture of the 3d stacked mram l2 cache for cmps,\" in HPCA, 2009."},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_27_1","DOI":"10.1145\/1065010.1065034"}],"event":{"sponsor":["SIGDA ACM Special Interest Group on Design Automation","IEEE CEDA","IEEE CASS"],"acronym":"GLSVLSI '16","name":"GLSVLSI '16: Great Lakes Symposium on VLSI 2016","location":"Boston Massachusetts USA"},"container-title":["Proceedings of the 26th edition on Great Lakes Symposium on VLSI"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2902961.2903015","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2902961.2903015","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T04:39:03Z","timestamp":1750221543000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2902961.2903015"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,5,18]]},"references-count":27,"alternative-id":["10.1145\/2902961.2903015","10.1145\/2902961"],"URL":"https:\/\/doi.org\/10.1145\/2902961.2903015","relation":{},"subject":[],"published":{"date-parts":[[2016,5,18]]},"assertion":[{"value":"2016-05-18","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}