{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:11:29Z","timestamp":1750306289455,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":14,"publisher":"ACM","license":[{"start":{"date-parts":[[2016,5,18]],"date-time":"2016-05-18T00:00:00Z","timestamp":1463529600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2016,5,18]]},"DOI":"10.1145\/2902961.2903034","type":"proceedings-article","created":{"date-parts":[[2016,5,13]],"date-time":"2016-05-13T18:21:10Z","timestamp":1463163670000},"page":"21-26","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":1,"title":["A Design of a Non-Volatile PMC-Based (Programmable Metallization Cell) Register File"],"prefix":"10.1145","author":[{"given":"Salin","family":"Junsangsri","sequence":"first","affiliation":[{"name":"Northeastern University, Boston, MA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jie","family":"Han","sequence":"additional","affiliation":[{"name":"University of Alberta, Edmonton, AB, Canada"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Fabrizio","family":"Lombardi","sequence":"additional","affiliation":[{"name":"Northeastern University, Boston, MA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2016,5,18]]},"reference":[{"doi-asserted-by":"publisher","key":"e_1_3_2_1_1_1","DOI":"10.1039\/c2nr12134d"},{"key":"e_1_3_2_1_2_1","first-page":"731","volume-title":"Automation and Test in Europe","author":"Li H.","year":"2009","unstructured":"H. Li , Y. Chen , L. Benini , G. De Micheli , B. Al-hashimi, W. Mueller \" An Overview of Non-Volatile Memory Technology and the Implication for Tools and Architectures\" Design , Automation and Test in Europe pp. 731 -- 736 , 2009 H. Li, Y. Chen, L. Benini, G. De Micheli, B. Al-hashimi, W. Mueller \"An Overview of Non-Volatile Memory Technology and the Implication for Tools and Architectures\" Design, Automation and Test in Europe pp.731--736, 2009"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_3_1","DOI":"10.1016\/j.jallcom.2013.06.095"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_4_1","DOI":"10.1145\/2770287.2770299"},{"key":"e_1_3_2_1_5_1","first-page":"178","volume-title":"IEEE Conference Publications. On Microelectronics and Electronics","author":"Hao YAN","year":"2010","unstructured":"Hao YAN , Yan LIU, Dong-hui WANG , Chao-huan HOU \"A Low-power 8-Read 4- Write Register File Design\" IEEE Conference Publications. On Microelectronics and Electronics , pp. 178 -- 181 , Sept. 2010 . doi: 10.1109\/PRIMEASIA.2010.5604933 10.1109\/PRIMEASIA.2010.5604933 Hao YAN, Yan LIU, Dong-hui WANG, Chao-huan HOU \"A Low-power 8-Read 4-Write Register File Design\" IEEE Conference Publications. On Microelectronics and Electronics, pp. 178--181, Sept. 2010. doi: 10.1109\/PRIMEASIA.2010.5604933"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_6_1","DOI":"10.1109\/TNANO.2014.2353992"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_7_1","DOI":"10.1016\/j.mejo.2011.09.009"},{"key":"e_1_3_2_1_8_1","volume-title":"Low Power and Reliable SRAM Memory Cell and Array Design (pp. 6) Springer Series in Advanced Microelectronics","author":"Osada K.","year":"2011","unstructured":"K. Osada ( 2011 ). Fundamental of SRAM Memory Cell . In K. Osada, K. Ishibashi (Eds.), Low Power and Reliable SRAM Memory Cell and Array Design (pp. 6) Springer Series in Advanced Microelectronics , vol. 31 K. Osada (2011). Fundamental of SRAM Memory Cell. In K. Osada, K. Ishibashi (Eds.), Low Power and Reliable SRAM Memory Cell and Array Design (pp. 6) Springer Series in Advanced Microelectronics, vol. 31"},{"unstructured":"PTM Model 32-nm MOSFETs. Retrieved from http:\/\/www.ptm.asu.edu  PTM Model 32-nm MOSFETs. Retrieved from http:\/\/www.ptm.asu.edu","key":"e_1_3_2_1_9_1"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_10_1","DOI":"10.1109\/23.488777"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_11_1","DOI":"10.1109\/JSSC.1987.1052809"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_12_1","DOI":"10.1109\/TNANO.2014.2329915"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_13_1","DOI":"10.1109\/ASAP.2012.21"},{"key":"e_1_3_2_1_14_1","first-page":"69","volume-title":"17th IEEE Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems","author":"Wei W.","year":"2014","unstructured":"W. Wei , K. Namba , and F. Lombardi , \" Design and Analysis of Non-Volatile Memory Cells for SEU Tolerance,\" Proc . 17th IEEE Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems , pp. 69 -- 74 , Amsterdam , October 2014 W. Wei, K. Namba, and F. Lombardi, \"Design and Analysis of Non-Volatile Memory Cells for SEU Tolerance,\" Proc. 17th IEEE Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, pp. 69--74, Amsterdam, October 2014"}],"event":{"sponsor":["SIGDA ACM Special Interest Group on Design Automation","IEEE CEDA","IEEE CASS"],"acronym":"GLSVLSI '16","name":"GLSVLSI '16: Great Lakes Symposium on VLSI 2016","location":"Boston Massachusetts USA"},"container-title":["Proceedings of the 26th edition on Great Lakes Symposium on VLSI"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2902961.2903034","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2902961.2903034","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T04:39:03Z","timestamp":1750221543000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2902961.2903034"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,5,18]]},"references-count":14,"alternative-id":["10.1145\/2902961.2903034","10.1145\/2902961"],"URL":"https:\/\/doi.org\/10.1145\/2902961.2903034","relation":{},"subject":[],"published":{"date-parts":[[2016,5,18]]},"assertion":[{"value":"2016-05-18","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}