{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,7]],"date-time":"2026-04-07T05:23:42Z","timestamp":1775539422500,"version":"3.50.1"},"publisher-location":"New York, NY, USA","reference-count":9,"publisher":"ACM","license":[{"start":{"date-parts":[[2016,3,4]],"date-time":"2016-03-04T00:00:00Z","timestamp":1457049600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2016,3,4]]},"DOI":"10.1145\/2905055.2905308","type":"proceedings-article","created":{"date-parts":[[2016,8,26]],"date-time":"2016-08-26T12:40:09Z","timestamp":1472215209000},"page":"1-5","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":2,"title":["Performance Augmentation of 2:1 Mux Using Transmission Gate"],"prefix":"10.1145","author":[{"given":"Mohit","family":"Vyas","sequence":"first","affiliation":[{"name":"ECE Department, ITM University, Gwalior (M.P.)"}]},{"given":"Shyam","family":"Akashe","sequence":"additional","affiliation":[{"name":"ECE Department, ITM University, Gwalior (M.P.)"}]}],"member":"320","published-online":{"date-parts":[[2016,3,4]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"Gupta I. Arora N. and Singh B.P. Simulation and Analysis of 2:1 Multiplexer Circuits at 90nm Technology. In proceeding Of International Journal Of Modern Engineering Research vol. 1 no. 2 pp. 642--646.  Gupta I. Arora N. and Singh B.P. Simulation and Analysis of 2:1 Multiplexer Circuits at 90nm Technology. In proceeding Of International Journal Of Modern Engineering Research vol. 1 no. 2 pp. 642--646."},{"key":"e_1_3_2_1_2_1","unstructured":"Gupta I. Arora N. and Singh B.P. New Design Of High Performance of 2:1 Multiplexer. In proceeding Of International Journal Of Engineering Research 1492--1496.  Gupta I. Arora N. and Singh B.P. New Design Of High Performance of 2:1 Multiplexer. In proceeding Of International Journal Of Engineering Research 1492--1496."},{"key":"e_1_3_2_1_3_1","unstructured":"Gupta I. Arora N. and Singh B.P. 2012. Design and Analysis OF 2:1 Multiplexer Circuits for High Performance Digital System. In proceeding Of International Journal of Electronics and Communication Technology 642--646.  Gupta I. Arora N. and Singh B.P. 2012. Design and Analysis OF 2:1 Multiplexer Circuits for High Performance Digital System. In proceeding Of International Journal of Electronics and Communication Technology 642--646."},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"crossref","unstructured":"Greaves D.J. Nam M.J.. 2010. Synthesis of Glue Logic Transactors Multiplexors and Serialisors from Protocol Specifications In proceeding of Institute of Electrical and Electronics Engineering 1--7 DOI= 10.1049\/ic.2010.0148  Greaves D.J. Nam M.J.. 2010. Synthesis of Glue Logic Transactors Multiplexors and Serialisors from Protocol Specifications In proceeding of Institute of Electrical and Electronics Engineering 1--7 DOI= 10.1049\/ic.2010.0148","DOI":"10.1049\/ic.2010.0148"},{"key":"e_1_3_2_1_5_1","volume-title":"Proceedings of IEEE Conference, 1--4, DOI= 10","author":"Hamouche L.","year":"2010"},{"key":"e_1_3_2_1_6_1","unstructured":"Jain A. and Hassan A. Design of Low Power Multiplexer Using Different Logics In proceeding of IJSTM.  Jain A. and Hassan A. Design of Low Power Multiplexer Using Different Logics In proceeding of IJSTM."},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICETET.2008.47"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.880630"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"crossref","unstructured":"Yazdi A. Micheal M. 2011. A 40- Gb\/s Full-Rate 2:1 MUX in 0.18-μm CMOS \" IEEE TRANSACTIONS ON Microwave Theory and Techniques vol. 59 no. 11.(November 2011) California 2879--2887 DOI=10.1109\/TMTT.2011.2165849  Yazdi A. Micheal M. 2011. A 40- Gb\/s Full-Rate 2:1 MUX in 0.18-μm CMOS \" IEEE TRANSACTIONS ON Microwave Theory and Techniques vol. 59 no. 11.(November 2011) California 2879--2887 DOI=10.1109\/TMTT.2011.2165849","DOI":"10.1109\/TMTT.2011.2165849"}],"event":{"name":"ICTCS '16: Second International Conference on Information and Communication Technology for Competitive Strategies","location":"Udaipur India","acronym":"ICTCS '16"},"container-title":["Proceedings of the Second International Conference on Information and Communication Technology for Competitive Strategies"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2905055.2905308","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2905055.2905308","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T04:38:46Z","timestamp":1750221526000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2905055.2905308"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,3,4]]},"references-count":9,"alternative-id":["10.1145\/2905055.2905308","10.1145\/2905055"],"URL":"https:\/\/doi.org\/10.1145\/2905055.2905308","relation":{},"subject":[],"published":{"date-parts":[[2016,3,4]]},"assertion":[{"value":"2016-03-04","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}