{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:48:49Z","timestamp":1750308529104,"version":"3.41.0"},"reference-count":22,"publisher":"Association for Computing Machinery (ACM)","issue":"4","license":[{"start":{"date-parts":[[2016,5,13]],"date-time":"2016-05-13T00:00:00Z","timestamp":1463097600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/501100004663","name":"Ministry of Science and Technology of Taiwan","doi-asserted-by":"crossref","award":["MOST104-2220-E-009-008"],"award-info":[{"award-number":["MOST104-2220-E-009-008"]}],"id":[{"id":"10.13039\/501100004663","id-type":"DOI","asserted-by":"crossref"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["J. Emerg. Technol. Comput. Syst."],"published-print":{"date-parts":[[2016,7,26]]},"abstract":"<jats:p>Power dissipation has become a pressing issue of concern in the designs of most electronic system as fabrication processes enter even deeper submicron regions. More specifically, leakage power plays a dominant role in system power dissipation. An emerging circuit design style, the reconfigurable single-electron transistor (SET) array, has been proposed for continuing Moore's Law due to its ultra-low leakage power consumption. Recently, several works have been proposed to address the issues related to automated synthesis for the reconfigurable SET array. Nevertheless, all of those existing approaches consider mandatory fabrication constraints of SET array merely in late synthesis stages. In this article, we propose a synthesis algorithm, featuring input-variable ordering and dynamic product term ordering, for area minimization. The fabrication constraints are taken into account at every synthesis stage of proposed flow to guarantee better synthesis outcomes. We also develop a simulated annealing-based postprocess to find a proper phase assignment of each input variable for further area reduction. Experimental results show that our new methodology can achieve up to 29% area reduction as compared to existing state-of-the-art techniques.<\/jats:p>","DOI":"10.1145\/2906360","type":"journal-article","created":{"date-parts":[[2016,5,16]],"date-time":"2016-05-16T12:27:17Z","timestamp":1463401637000},"page":"1-15","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":2,"title":["Area Minimization Synthesis for Reconfigurable Single-Electron Transistor Arrays with Fabrication Constraints"],"prefix":"10.1145","volume":"12","author":[{"given":"Yi-Hang","family":"Chen","sequence":"first","affiliation":[{"name":"National Chiao Tung University, Hsinchu City, Taiwan"}]},{"given":"Jian-Yu","family":"Chen","sequence":"additional","affiliation":[{"name":"National Chiao Tung University, Hsinchu City, Taiwan"}]},{"given":"Juinn-Dar","family":"Huang","sequence":"additional","affiliation":[{"name":"National Chiao Tung University, Hsinchu City, Taiwan"}]}],"member":"320","published-online":{"date-parts":[[2016,5,13]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/16.595938"},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1986.1676819"},{"volume-title":"Proceedings of Design Automation and Test in Europe. Article 123","author":"Chen Y. H.","key":"e_1_2_1_3_1"},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/2024724.2024920"},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/2422094.2422099"},{"volume-title":"Proceedings of Design Automation and Test in Europe. 1807--1802","author":"Chiang C. E.","key":"e_1_2_1_6_1"},{"key":"e_1_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/NANOARCH.2008.4585793"},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1016\/S1386-9477(01)00193-X"},{"key":"e_1_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1063\/1.2761837"},{"key":"e_1_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2002.801291"},{"volume-title":"Proceedings of IEEE International Electron Devices Meeting. 585--588","author":"Kasai S.","key":"e_1_2_1_11_1"},{"volume-title":"Proceedings of International Symposium on Semiconductor Device Research. 622--625","author":"Kasai S.","key":"e_1_2_1_12_1"},{"volume-title":"Proceedings of Design Automation and Test in Europe. Article 122","author":"Liu C. W.","key":"e_1_2_1_13_1"},{"key":"e_1_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2015.2395252"},{"volume-title":"Proceedings of IEEE International Electron Devices Meeting. 4.5.1--4.5.4.","author":"Liu L.","key":"e_1_2_1_15_1"},{"key":"e_1_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1126\/science.1061797"},{"key":"e_1_2_1_17_1","unstructured":"Semiconductor Industry Association. 2006. International Technology Roadmap for Semiconductors.  Semiconductor Industry Association. 2006. International Technology Roadmap for Semiconductors."},{"volume-title":"Cudd: Cu decision diagram package - release 2.4.2","year":"2009","author":"Somenzi F.","key":"e_1_2_1_18_1"},{"key":"e_1_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1063\/1.1569994"},{"volume-title":"Proceedings of International Solid-State Circuits Conference, Technical Digest. 206","author":"Uchida K.","key":"e_1_2_1_20_1"},{"key":"e_1_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/16.310117"},{"key":"e_1_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1063\/1.121014"}],"container-title":["ACM Journal on Emerging Technologies in Computing Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2906360","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2906360","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T18:55:50Z","timestamp":1750272950000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2906360"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,5,13]]},"references-count":22,"journal-issue":{"issue":"4","published-print":{"date-parts":[[2016,7,26]]}},"alternative-id":["10.1145\/2906360"],"URL":"https:\/\/doi.org\/10.1145\/2906360","relation":{},"ISSN":["1550-4832","1550-4840"],"issn-type":[{"type":"print","value":"1550-4832"},{"type":"electronic","value":"1550-4840"}],"subject":[],"published":{"date-parts":[[2016,5,13]]},"assertion":[{"value":"2015-08-01","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2016-03-01","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2016-05-13","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}