{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,1]],"date-time":"2025-10-01T15:16:21Z","timestamp":1759331781167,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":31,"publisher":"ACM","license":[{"start":{"date-parts":[[2016,6,1]],"date-time":"2016-06-01T00:00:00Z","timestamp":1464739200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2016,6]]},"DOI":"10.1145\/2925426.2926284","type":"proceedings-article","created":{"date-parts":[[2016,6,10]],"date-time":"2016-06-10T13:04:07Z","timestamp":1465563847000},"page":"1-12","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":23,"title":["Write-Aware Management of NVM-based Memory Extensions"],"prefix":"10.1145","author":[{"given":"Amro","family":"Awad","sequence":"first","affiliation":[{"name":"North Carolina State University, Raleigh, NC USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sergey","family":"Blagodurov","sequence":"additional","affiliation":[{"name":"Advanced Micro Devices, Inc., Bellevue, WA USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yan","family":"Solihin","sequence":"additional","affiliation":[{"name":"North Carolina State University, Raleigh, NC USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2016,6]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"A. Huan. NVM Express Revision 1.0c. Intel Corporation 2012.  A. Huan. NVM Express Revision 1.0c. Intel Corporation 2012."},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1063\/1.1707228"},{"key":"e_1_3_2_1_4_1","unstructured":"Intel 3D XPoint.  Intel 3D XPoint."},{"key":"e_1_3_2_1_5_1","volume-title":"http:\/\/pmem.io","author":"Programming Persistent Memory","year":"2014","unstructured":"Persistent Memory Programming . http:\/\/pmem.io , 2014 . Persistent Memory Programming. http:\/\/pmem.io, 2014."},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2015.7095793"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/2000064.2000086"},{"key":"e_1_3_2_1_8_1","volume-title":"The Speed of Possibility Outside. In Intel Developer Forum (IDF)","author":"Crooke R.","year":"2015","unstructured":"R. Crooke and A. Fazio . Intel Non-Volatile Memory Inside . The Speed of Possibility Outside. In Intel Developer Forum (IDF) , 2015 . R. Crooke and A. Fazio. Intel Non-Volatile Memory Inside. The Speed of Possibility Outside. In Intel Developer Forum (IDF), 2015."},{"key":"e_1_3_2_1_9_1","volume-title":"ANS MC2015","author":"Gunow G.","year":"2015","unstructured":"G. Gunow , J. R. Tramm , B. Forget , and K. Smith . Simplemoc - a performance abstraction for 3d moc . In ANS MC2015 . American Nuclear Society , 2015 . G. Gunow, J. R. Tramm, B. Forget, and K. Smith. Simplemoc - a performance abstraction for 3d moc. In ANS MC2015. American Nuclear Society, 2015."},{"key":"e_1_3_2_1_10_1","volume-title":"Sandia Report","author":"Heroux M.","year":"2009","unstructured":"M. Heroux , D. Doerfler , P. Crozier , J. Willenbring , C. Edwards , A. Williams , M. Rajan , E. Keiter , H. K. Thornquist , and R. W. Numrich . Improving performance via mini-applications . In Sandia Report 2009 . M. Heroux, D. Doerfler, P. Crozier, J. Willenbring, C. Edwards, A. Williams, M. Rajan, E. Keiter, H. K. Thornquist, and R. W. Numrich. Improving performance via mini-applications. In Sandia Report 2009."},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555758"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2013.6522320"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/2485922.2485929"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.2015.30"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669117"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555815.1555760"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/1995896.1995911"},{"key":"e_1_3_2_1_18_1","first-page":"14","volume-title":"Proceedings of the 2010 USENIX conference on USENIX Annual Technical Conference (USENIX-ATC)","author":"Saxena M.","year":"2010","unstructured":"M. Saxena and M. M. Swift . FlashVM: Virtual Memory Management on Flash . In Proceedings of the 2010 USENIX conference on USENIX Annual Technical Conference (USENIX-ATC) , pages 14 -- 14 . USENIX Association , 2010 . M. Saxena and M. M. Swift. FlashVM: Virtual Memory Management on Flash. In Proceedings of the 2010 USENIX conference on USENIX Annual Technical Conference (USENIX-ATC), pages 14--14. USENIX Association, 2010."},{"key":"e_1_3_2_1_19_1","volume-title":"Modern Operating Systems","author":"Tanenbaum A. S.","year":"2009","unstructured":"A. S. Tanenbaum . Modern Operating Systems . 2009 . A. S. Tanenbaum. Modern Operating Systems. 2009."},{"key":"e_1_3_2_1_20_1","first-page":"39","volume-title":"Solving Software Challenges for Exascale","author":"Tramm J. R.","year":"2014","unstructured":"J. R. Tramm , A. R. Siegel , B. Forget , and C. Josey . Performance analysis of a reduced data movement algorithm for neutron cross section data in monte carlo simulations . In Solving Software Challenges for Exascale , pages 39 -- 56 . Springer , 2014 . J. R. Tramm, A. R. Siegel, B. Forget, and C. Josey. Performance analysis of a reduced data movement algorithm for neutron cross section data in monte carlo simulations. In Solving Software Challenges for Exascale, pages 39--56. Springer, 2014."},{"volume-title":"PHYSOR 2014 - The Role of Reactor Physics toward a Sustainable Future, Kyoto.","author":"Tramm J. R.","key":"e_1_3_2_1_21_1","unstructured":"J. R. Tramm , A. R. Siegel , T. Islam , and M. Schulz . XSBench - The Development and Verification of a Performance Abstraction for Monte Carlo Reactor Analysis . In PHYSOR 2014 - The Role of Reactor Physics toward a Sustainable Future, Kyoto. J. R. Tramm, A. R. Siegel, T. Islam, and M. Schulz. XSBench - The Development and Verification of a Performance Abstraction for Monte Carlo Reactor Analysis. In PHYSOR 2014 - The Role of Reactor Physics toward a Sustainable Future, Kyoto."},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1145\/2818950.2818978"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1007\/s10586-013-0309-0"},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2012.69"},{"key":"e_1_3_2_1_25_1","first-page":"309","volume-title":"Proceedings of the 12th USENIX Conference on File and Storage Technologies (USENIX-FAST)","author":"Vu\u010dini\u0107 D.","year":"2014","unstructured":"D. Vu\u010dini\u0107 , Q. Wang , C. Guyot , R. Mateescu , F. Blagojevi\u0107 , L. Franca-Neto , D. L. Moal , T. Bunker , J. Xu , S. Swanson , and Z. Bandi\u0107 . DC Express: Shortest Latency Protocol for Reading Phase Change Memory over PCI Express . In Proceedings of the 12th USENIX Conference on File and Storage Technologies (USENIX-FAST) , pages 309 -- 315 , 2014 . D. Vu\u010dini\u0107, Q. Wang, C. Guyot, R. Mateescu, F. Blagojevi\u0107, L. Franca-Neto, D. L. Moal, T. Bunker, J. Xu, S. Swanson, and Z. Bandi\u0107. DC Express: Shortest Latency Protocol for Reading Phase Change Memory over PCI Express. In Proceedings of the 12th USENIX Conference on File and Storage Technologies (USENIX-FAST), pages 309--315, 2014."},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2007.377981"},{"key":"e_1_3_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1145\/360128.360154"},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1038\/nnano.2012.240"},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1145\/2694344.2694387"},{"key":"e_1_3_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2015.7357179"},{"key":"e_1_3_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1109\/MSST.2015.7208275"},{"key":"e_1_3_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555759"}],"event":{"name":"ICS '16: 2016 International Conference on Supercomputing","sponsor":["SIGARCH ACM Special Interest Group on Computer Architecture"],"location":"Istanbul Turkey","acronym":"ICS '16"},"container-title":["Proceedings of the 2016 International Conference on Supercomputing"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2925426.2926284","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2925426.2926284","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T19:04:25Z","timestamp":1750273465000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2925426.2926284"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,6]]},"references-count":31,"alternative-id":["10.1145\/2925426.2926284","10.1145\/2925426"],"URL":"https:\/\/doi.org\/10.1145\/2925426.2926284","relation":{},"subject":[],"published":{"date-parts":[[2016,6]]},"assertion":[{"value":"2016-06-01","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}