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Code Optim."],"published-print":{"date-parts":[[2016,6,27]]},"abstract":"<jats:p>\n            Networks-on-Chip (NoC) are becoming increasingly susceptible to emerging reliability threats. The need to\n            <jats:italic>detect<\/jats:italic>\n            and\n            <jats:italic>localize<\/jats:italic>\n            the occurrence of faults at runtime is steadily becoming imperative. In this work, we propose\n            <jats:bold>\n              <jats:italic>NoCAlert<\/jats:italic>\n            <\/jats:bold>\n            , a comprehensive online and real-time fault detection and localization mechanism that demonstrates 0% false negatives within the interconnect for the fault models and stimulus set used in this study. Based on the concept of invariance checking, NoCAlert employs a group of lightweight microchecker modules that collectively implement real-time hardware assertions. The checkers operate concurrently with normal NoC operation, thus eliminating the need for periodic, or triggered-based, self-testing. Based on the pattern\/signature of asserted checkers, NoCAlert can pinpoint the location of the fault at various granularity levels. Most important, 97% of the transient and 90% of the permanent faults are detected instantaneously, within a single clock cycle upon fault manifestation. The fault localization accuracy ranges from 90% to 100%, depending on the desired localization granularity. Extensive cycle-accurate simulations in a 64-node CMP and analysis at the RTL netlist-level demonstrate the efficacy of the proposed technique.\n          <\/jats:p>","DOI":"10.1145\/2930670","type":"journal-article","created":{"date-parts":[[2016,6,14]],"date-time":"2016-06-14T12:29:28Z","timestamp":1465907368000},"page":"1-26","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":12,"title":["An Online and Real-Time Fault Detection and Localization Mechanism for Network-on-Chip Architectures"],"prefix":"10.1145","volume":"13","author":[{"given":"Kypros","family":"Chrysanthou","sequence":"first","affiliation":[{"name":"University of Cyprus, Nicosia, Cyprus"}]},{"given":"Panayiotis","family":"Englezakis","sequence":"additional","affiliation":[{"name":"University of Cyprus, Nicosia, Cyprus"}]},{"given":"Andreas","family":"Prodromou","sequence":"additional","affiliation":[{"name":"University of Cyprus, Nicosia, Cyprus"}]},{"given":"Andreas","family":"Panteli","sequence":"additional","affiliation":[{"name":"University of Cyprus, Nicosia, Cyprus"}]},{"given":"Chrysostomos","family":"Nicopoulos","sequence":"additional","affiliation":[{"name":"University of Cyprus, Nicosia, Cyprus"}]},{"given":"Yiannakis","family":"Sazeides","sequence":"additional","affiliation":[{"name":"University of Cyprus, Nicosia, Cyprus"}]},{"given":"Giorgos","family":"Dimitrakopoulos","sequence":"additional","affiliation":[{"name":"Democritus University of Thrace, Xanthi, Greece"}]}],"member":"320","published-online":{"date-parts":[[2016,6,14]]},"reference":[{"key":"e_1_2_2_1_1","volume-title":"IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS\u201909)","author":"Agarwal N.","unstructured":"N. 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