{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:09:24Z","timestamp":1750306164587,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":35,"publisher":"ACM","license":[{"start":{"date-parts":[[2016,7,11]],"date-time":"2016-07-11T00:00:00Z","timestamp":1468195200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2016,7,11]]},"DOI":"10.1145\/2935764.2935796","type":"proceedings-article","created":{"date-parts":[[2016,7,8]],"date-time":"2016-07-08T15:03:00Z","timestamp":1467990180000},"page":"121-132","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":26,"title":["Investigating the Performance of Hardware Transactions on a Multi-Socket Machine"],"prefix":"10.1145","author":[{"given":"Trevor","family":"Brown","sequence":"first","affiliation":[{"name":"University of Toronto, Toronto, ON, Canada"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Alex","family":"Kogan","sequence":"additional","affiliation":[{"name":"Oracle Labs, Burlington, MA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yossi","family":"Lev","sequence":"additional","affiliation":[{"name":"Oracle Labs, Burlington, MA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Victor","family":"Luchangco","sequence":"additional","affiliation":[{"name":"Oracle Labs, Burlington, MA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2016,7,11]]},"reference":[{"key":"e_1_3_2_1_1_1","first-page":"1259","article-title":"An algorithm for the organization of information","volume":"3","author":"Adelson-Velsky G.","year":"1962","unstructured":"G. Adelson-Velsky and E. Landis . An algorithm for the organization of information . Soviet Mathematics Doklady , 3 : 1259 -- 1263 , 1962 . G. Adelson-Velsky and E. Landis. An algorithm for the organization of information. Soviet Mathematics Doklady, 3:1259--1263, 1962.","journal-title":"Soviet Mathematics Doklady"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/2611462.2611482"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-662-48653-5_21"},{"key":"e_1_3_2_1_4_1","volume-title":"June","author":"Ahn J. H.","year":"2012","unstructured":"J. H. Ahn . ccTSA: A Coverage-Centric Threaded Sequence Assembler. PLoS ONE, 7(6) , June 2012 . J. H. Ahn. ccTSA: A Coverage-Centric Threaded Sequence Assembler. PLoS ONE, 7(6), June 2012."},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1007\/s11227-012-0854-y"},{"key":"e_1_3_2_1_6_1","volume-title":"Proc. USENIX ATC","author":"Blagodurov S.","year":"2011","unstructured":"S. Blagodurov , S. Zhuravlev , M. Dashti , and A. Fedorova . A case for NUMA-aware contention management on multicore systems . In Proc. USENIX ATC , 2011 . S. Blagodurov, S. Zhuravlev, M. Dashti, and A. Fedorova. A case for NUMA-aware contention management on multicore systems. In Proc. USENIX ATC, 2011."},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/74851.74854"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-03850-6_7"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/2380403.2380431"},{"key":"e_1_3_2_1_10_1","volume-title":"CoRR","author":"Dice D.","year":"2015","unstructured":"D. Dice , T. Harris , A. Kogan , and Y. Lev . The influence of malloc placement on TSX hardware transactional memory . CoRR , 2015 . D. Dice, T. Harris, A. Kogan, and Y. Lev. The influence of malloc placement on TSX hardware transactional memory. CoRR, 2015."},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/2851141.2851162"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/2612669.2612696"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/1508244.1508263"},{"key":"e_1_3_2_1_14_1","volume-title":"Sun Labs","author":"Dice D.","year":"2009","unstructured":"D. Dice , Y. Lev , M. Moir , D. Nussbaum , and M. Olszewski . Early experience with a commercial hardware transactional memory implementation. Technical report , Sun Labs , 2009 . D. Dice, Y. Lev, M. Moir, D. Nussbaum, and M. Olszewski. Early experience with a commercial hardware transactional memory implementation. Technical report, Sun Labs, 2009."},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/2686884"},{"key":"e_1_3_2_1_16_1","first-page":"209","volume-title":"Proceedings of the International Conference on Autonomic Computing (ICAC)","author":"Diegues N.","year":"2014","unstructured":"N. Diegues and P. Romano . Self-tuning Intel transactional synchronization extensions . In Proceedings of the International Conference on Autonomic Computing (ICAC) , pages 209 -- 219 , 2014 . N. Diegues and P. Romano. Self-tuning Intel transactional synchronization extensions. In Proceedings of the International Conference on Autonomic Computing (ICAC), pages 209--219, 2014."},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/2755573.2755578"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/2628071.2628080"},{"key":"e_1_3_2_1_19_1","article-title":"Remote transaction commit: Centralizing software transactional memory commits","author":"Hassan A.","year":"2015","unstructured":"A. Hassan , R. Palmieri , and B. Ravindran . Remote transaction commit: Centralizing software transactional memory commits . IEEE Transactions on Computers, pages 26--33 , 2015 . A. Hassan, R. Palmieri, and B. Ravindran. Remote transaction commit: Centralizing software transactional memory commits. IEEE Transactions on Computers, pages 26--33, 2015.","journal-title":"IEEE Transactions on Computers, pages 26--33"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/165123.165164"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2014.264"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/71.180624"},{"key":"e_1_3_2_1_23_1","volume-title":"Proc. USENIX ATC","author":"Lepers B.","year":"2015","unstructured":"B. Lepers , V. Quema , and A. Fedorova . Thread and memory placement on NUMA systems: Asymmetry matters . In Proc. USENIX ATC , 2015 . B. Lepers, V. Quema, and A. Fedorova. Thread and memory placement on NUMA systems: Asymmetry matters. In Proc. USENIX ATC, 2015."},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1145\/1362622.1362694"},{"key":"e_1_3_2_1_25_1","volume-title":"Proc. USENIX ATC","author":"Lozi J.-P.","year":"2012","unstructured":"J.-P. Lozi , F. David , G. Thomas , J. Lawall , and G. Muller . Remote core locking: Migrating critical-section execution to improve the performance of multithreaded applications . In Proc. USENIX ATC , 2012 . J.-P. Lozi, F. David, G. Thomas, J. Lawall, and G. Muller. Remote core locking: Migrating critical-section execution to improve the performance of multithreaded applications. In Proc. USENIX ATC, 2012."},{"key":"e_1_3_2_1_26_1","volume-title":"Proceedings of 6th Workshop on the Theory of Transactional Memory (WTTM)","author":"Matveev A.","year":"2014","unstructured":"A. Matveev and N. Shavit . Reduced hardware lock elision . In Proceedings of 6th Workshop on the Theory of Transactional Memory (WTTM) , 2014 . A. Matveev and N. Shavit. Reduced hardware lock elision. In Proceedings of 6th Workshop on the Theory of Transactional Memory (WTTM), 2014."},{"key":"e_1_3_2_1_27_1","first-page":"35","volume-title":"Proceedings of the International Symposium on Workload Characterization (IISWC)","author":"Minh C. C.","year":"2008","unstructured":"C. C. Minh , J. Chung , C. Kozyrakis , and K. Olukotun . STAMP: stanford transactional applications for multi-processing . In Proceedings of the International Symposium on Workload Characterization (IISWC) , pages 35 -- 46 , 2008 . C. C. Minh, J. Chung, C. Kozyrakis, and K. Olukotun. STAMP: stanford transactional applications for multi-processing. In Proceedings of the International Symposium on Workload Characterization (IISWC), pages 35--46, 2008."},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1145\/2749469.2750403"},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2011.6114208"},{"key":"e_1_3_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1145\/1993498.1993502"},{"key":"e_1_3_2_1_31_1","volume-title":"Proceedings of ACM SIGPLAN Workshop on Transactional Computing (TRANSACT)","author":"Ruan W.","year":"2014","unstructured":"W. Ruan , Y. Liu , and M. Spear . STAMP need not be considered harmful . In Proceedings of ACM SIGPLAN Workshop on Transactional Computing (TRANSACT) , 2014 . W. Ruan, Y. Liu, and M. Spear. STAMP need not be considered harmful. In Proceedings of ACM SIGPLAN Workshop on Transactional Computing (TRANSACT), 2014."},{"key":"e_1_3_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2013.6522318"},{"key":"e_1_3_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1145\/248209.237205"},{"key":"e_1_3_2_1_34_1","doi-asserted-by":"publisher","DOI":"10.1145\/2503210.2503232"},{"key":"e_1_3_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.1145\/1378533.1378564"}],"event":{"name":"SPAA '16: 28th ACM Symposium on Parallelism in Algorithms and Architectures","sponsor":["SIGACT ACM Special Interest Group on Algorithms and Computation Theory","SIGARCH ACM Special Interest Group on Computer Architecture"],"location":"Pacific Grove California USA","acronym":"SPAA '16"},"container-title":["Proceedings of the 28th ACM Symposium on Parallelism in Algorithms and Architectures"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2935764.2935796","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2935764.2935796","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T03:39:57Z","timestamp":1750217997000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2935764.2935796"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,7,11]]},"references-count":35,"alternative-id":["10.1145\/2935764.2935796","10.1145\/2935764"],"URL":"https:\/\/doi.org\/10.1145\/2935764.2935796","relation":{},"subject":[],"published":{"date-parts":[[2016,7,11]]},"assertion":[{"value":"2016-07-11","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}