{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,18]],"date-time":"2025-11-18T09:32:47Z","timestamp":1763458367504,"version":"3.45.0"},"publisher-location":"New York, NY, USA","reference-count":9,"publisher":"ACM","license":[{"start":{"date-parts":[[2017,6,4]],"date-time":"2017-06-04T00:00:00Z","timestamp":1496534400000},"content-version":"vor","delay-in-days":365,"URL":"http:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["CNS-1253424"],"award-info":[{"award-number":["CNS-1253424"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100006602","name":"Air Force Research Laboratory","doi-asserted-by":"publisher","award":["FA8750-15-2-0048"],"award-info":[{"award-number":["FA8750-15-2-0048"]}],"id":[{"id":"10.13039\/100006602","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2016,6,4]]},"DOI":"10.1145\/2947357.2947360","type":"proceedings-article","created":{"date-parts":[[2016,7,5]],"date-time":"2016-07-05T08:23:45Z","timestamp":1467707025000},"page":"1-4","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":2,"title":["Spin-Hall Assisted STT-RAM Design and Discussion"],"prefix":"10.1145","author":[{"given":"Enes","family":"Eken","sequence":"first","affiliation":[{"name":"Electrical and Computer Engineering, University of Pittsburgh, Pittsburgh, PA"}]},{"given":"Ismail","family":"Bayram","sequence":"additional","affiliation":[{"name":"Electrical and Computer Engineering, University of Pittsburgh, Pittsburgh, PA"}]},{"given":"Yaojun","family":"Zhang","sequence":"additional","affiliation":[{"name":"Electrical and Computer Engineering, University of Pittsburgh, Pittsburgh, PA"}]},{"given":"Bonan","family":"Yan","sequence":"additional","affiliation":[{"name":"Electrical and Computer Engineering, University of Pittsburgh, Pittsburgh, PA"}]},{"given":"Wenqing","family":"Wu","sequence":"additional","affiliation":[{"name":"Qualcomm Inc., San Diego, CA"}]},{"given":"Hai Helen","family":"Li","sequence":"additional","affiliation":[{"name":"Electrical and Computer Engineering, University of Pittsburgh, Pittsburgh, PA"}]},{"given":"Yiran","family":"Chen","sequence":"additional","affiliation":[{"name":"Electrical and Computer Engineering, University of Pittsburgh, Pittsburgh, PA"}]}],"member":"320","published-online":{"date-parts":[[2016,6,4]]},"reference":[{"key":"e_1_3_2_1_1_1","first-page":"239","volume-title":"HPCA 2009. IEEE 15th International Symposium on. IEEE","author":"Sun G.","year":"2009","unstructured":"G. Sun, X. Dong, Y. Xie, J. Li, and Y. Chen, \"A novel architecture of the 3d stacked mram l2 cache for cmps,\" in High Performance Computer Architecture, 2009. HPCA 2009. IEEE 15th International Symposium on. IEEE, 2009, pp. 239--249."},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2009.2035509"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/1687399.1687448"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1063\/1.4858465"},{"issue":"8","key":"e_1_3_2_1_5_1","first-page":"501","article-title":"Study of two writing schemes for a magnetic tunnel junction based on spin orbit torque","volume":"7","author":"Jabeur K.","year":"2013","unstructured":"K. Jabeur, L. Buda-Prejbeanu, G. Prenat, and G. Pendina, \"Study of two writing schemes for a magnetic tunnel junction based on spin orbit torque,\" International Journal of Electronics Science and Engineering, vol. 7, no. 8, pp. 501--507, 2013.","journal-title":"International Journal of Electronics Science and Engineering"},{"key":"e_1_3_2_1_6_1","volume-title":"Dstt-mram: Differential spin hall mram for on-chip memories,\" arXiv preprint arXiv:1305.4085","author":"Kim Y.","year":"2013","unstructured":"Y. Kim, S. H. Choday, and K. Roy, \"Dstt-mram: Differential spin hall mram for on-chip memories,\" arXiv preprint arXiv:1305.4085, 2013."},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevB.62.570"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/2593069.2593075"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/1629911.1629936"}],"event":{"name":"SLIP '16: System Level Interconnect Prediction Workshop","sponsor":["SIGDA ACM Special Interest Group on Design Automation","IEEE CS"],"location":"Austin TX USA","acronym":"SLIP '16"},"container-title":["Proceedings of the 18th System Level Interconnect Prediction Workshop"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2947357.2947360","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2947357.2947360","content-type":"application\/pdf","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2947357.2947360","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,11,18]],"date-time":"2025-11-18T09:20:47Z","timestamp":1763457647000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2947357.2947360"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,6,4]]},"references-count":9,"alternative-id":["10.1145\/2947357.2947360","10.1145\/2947357"],"URL":"https:\/\/doi.org\/10.1145\/2947357.2947360","relation":{},"subject":[],"published":{"date-parts":[[2016,6,4]]},"assertion":[{"value":"2016-06-04","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}