{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,19]],"date-time":"2026-06-19T02:25:14Z","timestamp":1781835914316,"version":"3.54.5"},"publisher-location":"New York, NY, USA","reference-count":29,"publisher":"ACM","license":[{"start":{"date-parts":[[2016,11,7]],"date-time":"2016-11-07T00:00:00Z","timestamp":1478476800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2016,11,7]]},"DOI":"10.1145\/2966986.2967047","type":"proceedings-article","created":{"date-parts":[[2016,10,18]],"date-time":"2016-10-18T12:23:59Z","timestamp":1476793439000},"page":"1-8","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":20,"title":["Improved flop tray-based design implementation for power reduction"],"prefix":"10.1145","author":[{"given":"Andrew B.","family":"Kahng","sequence":"first","affiliation":[{"name":"CSE andUC San Diego"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jiajia","family":"Li","sequence":"additional","affiliation":[{"name":"UC San Diego"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Lutong","family":"Wang","sequence":"additional","affiliation":[{"name":"UC San Diego"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2016,11,7]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1016\/S0166-218X(01)00339-0"},{"key":"e_1_3_2_1_2_1","first-page":"954","article-title":"Structured Placement of Latches\/Flip-Flops to Minimize Clock Power in High-Performance Designs","volume":"8","author":"Alpert C. J.","year":"2014","unstructured":"C. J. Alpert, Z. Li, G.-J. Nam, S. Ramji, C. N. Sze, P. G. Villarubia and N. Viswanathan, \"Structured Placement of Latches\/Flip-Flops to Minimize Clock Power in High-Performance Designs\", U.S. Patent 8,954,912, May 2014.","journal-title":"U.S. Patent"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.5555\/1283383.1283494"},{"key":"e_1_3_2_1_4_1","volume-title":"Proc","author":"Chen L.","year":"2010","unstructured":"L. Chen, A. Hung, H. M. Chen, E. Tsai, S. H. Chen, M. H. Ku and C. C. Chen, \"Using Multi-bit Flip-Flop for Clock Power Saving by DesignCompiler\", Proc. Synopsys User Group, 2010."},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1007\/s11390-015-1531-4"},{"key":"e_1_3_2_1_6_1","volume-title":"Qualcomm CDMA Technologies","author":"Dobre S.","year":"2016","unstructured":"S. Dobre, Qualcomm CDMA Technologies, Inc., personal communication, April 2016."},{"key":"e_1_3_2_1_7_1","volume-title":"March","author":"Nam G.-J.","year":"2016","unstructured":"G.-J. Nam, IBM, personal communication, March 2016."},{"key":"e_1_3_2_1_8_1","first-page":"431","volume-title":"Proc. ASP-DAC","author":"Hsu C.-C.","year":"2012","unstructured":"C.-C. Hsu, Y.-T. Chang and M. P.-H. Lin, \"Crosstalk-Aware Power Optimization with Multi-Bit Flip-Flops\", Proc. ASP-DAC, 2012, pp. 431--436."},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2009.4810370"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2011.2177459"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1137\/S0895480197329776"},{"key":"e_1_3_2_1_12_1","volume-title":"The Bad, and The Ugly\"","author":"Kretchmer Y.","year":"2001","unstructured":"Y. Kretchmer, \"Using Multi-Bit Register Inference to Save Area and Power: The Good, The Bad, and The Ugly\", EE Times Asia, 2001."},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2011.2165716"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2014.2376988"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/2491477.2491484"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/2560519.2560520"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.5555\/846213.846560"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2011.41"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1016\/0377-0427(87)90125-7"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/2451916.2451955"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2011.2177460"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1145\/2717764.2717767"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICGCS.2010.5542978"},{"key":"e_1_3_2_1_24_1","unstructured":"Cadence Innovus User Guide."},{"key":"e_1_3_2_1_25_1","unstructured":"IBM ILOG CPLEX. www.ilog.com\/products\/cplex\/"},{"key":"e_1_3_2_1_26_1","unstructured":"CAD\/CAM\/CAE Wallchart. http:\/\/www.garysmitheda.com\/wp-content\/uploads\/2015\/05\/All_WC-15.pdf"},{"key":"e_1_3_2_1_27_1","unstructured":"LEMON (Library for Efficient Modeling and Optimization in Networks). http:\/\/lemon.cs.elte.hu\/trac\/lemon"},{"key":"e_1_3_2_1_28_1","unstructured":"OpenCores. http:\/\/opencores.org"},{"key":"e_1_3_2_1_29_1","unstructured":"Synopsys Design Compiler User's Manual."}],"event":{"name":"ICCAD '16: IEEE\/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN","location":"Austin Texas","acronym":"ICCAD '16","sponsor":["SIGDA ACM Special Interest Group on Design Automation","IEEE CAS","IEEE CS","IEEE-EDS Electronic Devices Society"]},"container-title":["Proceedings of the 35th International Conference on Computer-Aided Design"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2966986.2967047","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2966986.2967047","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T04:23:12Z","timestamp":1750220592000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2966986.2967047"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,11,7]]},"references-count":29,"alternative-id":["10.1145\/2966986.2967047","10.1145\/2966986"],"URL":"https:\/\/doi.org\/10.1145\/2966986.2967047","relation":{},"subject":[],"published":{"date-parts":[[2016,11,7]]},"assertion":[{"value":"2016-11-07","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}