{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,31]],"date-time":"2025-10-31T07:38:58Z","timestamp":1761896338354,"version":"3.41.0"},"reference-count":12,"publisher":"Association for Computing Machinery (ACM)","issue":"1","license":[{"start":{"date-parts":[[2016,7,12]],"date-time":"2016-07-12T00:00:00Z","timestamp":1468281600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["SIGARCH Comput. Archit. News"],"published-print":{"date-parts":[[2016,7,12]]},"abstract":"<jats:p>Spinning had been the classical way of implementing synchronization primitives (i.e., barriers, locks and conditions) in pthread library before the adoption of fast user space mutex (futex). Since spinning cores do not perform any useful work, it has been believed that futex is more energyefficient than spinning. In this paper, using commercial chip multi-processors (CMPs), first we provide deep insights on how the commercial CMP and operating system together reduce power consumption during spinning- and futex-based synchronization and analyze the duration of synchronization cycles for each implementation. Second, we analyze limitations of existing techniques that attempt to reduce power consumption of CMPs during synchronization. Finally, we propose a spinning-based energy-efficient synchronization technique dubbed SpinWise. We demonstrate that SpinWise can provide 22% higher geometric mean energy efficiency than futex for a CMP running applications with many frequent and short synchronization events.<\/jats:p>","DOI":"10.1145\/2971331.2971333","type":"journal-article","created":{"date-parts":[[2016,7,15]],"date-time":"2016-07-15T14:36:21Z","timestamp":1468593381000},"page":"1-8","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":3,"title":["SpinWise"],"prefix":"10.1145","volume":"44","author":[{"given":"Hadi","family":"Asgharimoghaddam","sequence":"first","affiliation":[{"name":"University of Illinois, Urbana-Champaign"}]},{"given":"Nam Sung","family":"Kim","sequence":"additional","affiliation":[{"name":"University of Illinois, Urbana-Champaign"}]}],"member":"320","published-online":{"date-parts":[[2016,7,12]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2006.78"},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/1542275.1542340"},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2005.211"},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555792"},{"key":"e_1_2_1_5_1","volume-title":"The TURBO Diaries: Applicationcontrolled Frequency Scaling Explained,\" in USENIX Annual Technical Conference (USENIX ATC)","author":"Wamhoff J.-T.","year":"2014","unstructured":"J.-T. Wamhoff , , \" The TURBO Diaries: Applicationcontrolled Frequency Scaling Explained,\" in USENIX Annual Technical Conference (USENIX ATC) , 2014 . J.-T. Wamhoff, et al., \"The TURBO Diaries: Applicationcontrolled Frequency Scaling Explained,\" in USENIX Annual Technical Conference (USENIX ATC), 2014."},{"key":"e_1_2_1_6_1","unstructured":"Intel Corporation {Online}. Available: www.intel.com\/assets\/PDF\/designguide\/321736.pdf  Intel Corporation {Online}. Available: www.intel.com\/assets\/PDF\/designguide\/321736.pdf"},{"key":"e_1_2_1_7_1","volume-title":"IEEE Int. Symp. on VLSI Circuits","author":"Kurd N.","year":"2008","unstructured":"N. Kurd , in IEEE Int. Symp. on VLSI Circuits , 2008 . N. Kurd, et al., \"Next Generation Intel Micro-architecture (Nehalem) Clocking Architecture,\" in IEEE Int. Symp. on VLSI Circuits, 2008."},{"key":"e_1_2_1_8_1","volume-title":"Benchmarking and Simulation","author":"Bienia C.","year":"2009","unstructured":"C. Bienia , RSEC 2.0 : A New Benchmark Suite for Chip-Multiprocessors,\" in Workshop on Modeling , Benchmarking and Simulation , 2009 . C. Bienia, et al., \"PARSEC 2.0: A New Benchmark Suite for Chip-Multiprocessors,\" in Workshop on Modeling, Benchmarking and Simulation, 2009."},{"key":"e_1_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/223982.223990"},{"key":"e_1_2_1_10_1","unstructured":"{Online}. Available: http:\/\/en.wikipedia.org\/wiki\/Ivy_Bridge_(microarchitecture).  {Online}. Available: http:\/\/en.wikipedia.org\/wiki\/Ivy_Bridge_(microarchitecture)."},{"key":"e_1_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/2333660.2333711"},{"key":"e_1_2_1_12_1","unstructured":"\"Intel Core i7 4700MQ vs AMD FX 6100 \" {Online}. Available: http:\/\/cpuboss.com\/cpus\/Intel-Core-i7-4700MQ-vs-AMD-FX-6100.  \"Intel Core i7 4700MQ vs AMD FX 6100 \" {Online}. Available: http:\/\/cpuboss.com\/cpus\/Intel-Core-i7-4700MQ-vs-AMD-FX-6100."}],"container-title":["ACM SIGARCH Computer Architecture News"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2971331.2971333","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2971331.2971333","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T03:40:02Z","timestamp":1750218002000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2971331.2971333"}},"subtitle":["A Practical Energy-Efficient Synchronization Technique for CMPs"],"short-title":[],"issued":{"date-parts":[[2016,7,12]]},"references-count":12,"journal-issue":{"issue":"1","published-print":{"date-parts":[[2016,7,12]]}},"alternative-id":["10.1145\/2971331.2971333"],"URL":"https:\/\/doi.org\/10.1145\/2971331.2971333","relation":{},"ISSN":["0163-5964"],"issn-type":[{"type":"print","value":"0163-5964"}],"subject":[],"published":{"date-parts":[[2016,7,12]]},"assertion":[{"value":"2016-07-12","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}