{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:54:40Z","timestamp":1750308880244,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":31,"publisher":"ACM","license":[{"start":{"date-parts":[[2016,8,29]],"date-time":"2016-08-29T00:00:00Z","timestamp":1472428800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2016,8,29]]},"DOI":"10.1145\/2990509.2990510","type":"proceedings-article","created":{"date-parts":[[2017,1,20]],"date-time":"2017-01-20T19:40:44Z","timestamp":1484941244000},"page":"1-10","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":1,"title":["Building a Java\u2122 Virtual Machine for Non-Cache-Coherent Many-core Architectures"],"prefix":"10.1145","author":[{"given":"Foivos S.","family":"Zakkak","sequence":"first","affiliation":[{"name":"FORTH-ICS and University of Crete, Heraklion, Crete, Greece"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Polyvios","family":"Pratikakis","sequence":"additional","affiliation":[{"name":"FORTH-ICS, Heraklion, Crete, Greece"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2016,8,29]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"https:\/\/github.com\/CARV-ICS-FORTH\/disquawk.  https:\/\/github.com\/CARV-ICS-FORTH\/disquawk."},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/2442516.2442538"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1016\/S0167-8191(01)00093-X"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.5555\/850940.852885"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/1454115.1454128"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/324133.324234"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/1640089.1640097"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2013.6522319"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/1073970.1073974"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.2011.21"},{"key":"e_1_3_2_1_11_1","volume-title":"SC","author":"Dinan J.","year":"2009","unstructured":"J. Dinan , D. B. Larkins , P. Sadayappan , S. Krishnamoorthy , and J. Nieplocha . Scalable Work Stealing . In SC , 2009 . J. Dinan, D. B. Larkins, P. Sadayappan, S. Krishnamoorthy, and J. Nieplocha. Scalable Work Stealing. In SC, 2009."},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/DSD.2014.15"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2010.5434077"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/2145816.2145828"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/359545.359563"},{"key":"e_1_3_2_1_16_1","unstructured":"D. Lea. The JSR-133 cookbook for compiler writers 2008.  D. Lea. The JSR-133 cookbook for compiler writers 2008."},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2012.20"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/1040305.1040336"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/2209249.2209269"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/1869459.1869478"},{"key":"e_1_3_2_1_21_1","volume-title":"PACT","author":"Menezo L. G.","year":"2013","unstructured":"L. G. Menezo , V. Puente , and J. A. Gregorio . The Case for a Scalable Coherence Protocol for Complex On-chip Cache Hierarchies in Many Core Systems . In PACT , 2013 . L. G. Menezo, V. Puente, and J. A. Gregorio. The Case for a Scalable Coherence Protocol for Complex On-chip Cache Hierarchies in Many Core Systems. In PACT, 2013."},{"key":"e_1_3_2_1_22_1","volume-title":"PGAS","author":"Min S.-J.","year":"2011","unstructured":"S.-J. Min , C. Iancu , and K. Yelick . Hierarchical work stealing on manycore clusters . In PGAS , 2011 . S.-J. Min, C. Iancu, and K. Yelick. Hierarchical work stealing on manycore clusters. In PGAS, 2011."},{"key":"e_1_3_2_1_23_1","volume-title":"Workshop on Cell Systems and Applications","author":"Multiprocessor S.-c.","year":"2008","unstructured":"S.-c. Multiprocessor , A. Noll , A. Gal , and M. Franz . CellVM: A homogeneous virtual machine runtime system for a heterogeneous single-chip multiprocessor . Workshop on Cell Systems and Applications , 2008 . S.-c. Multiprocessor, A. Noll, A. Gal, and M. Franz. CellVM: A homogeneous virtual machine runtime system for a heterogeneous single-chip multiprocessor. Workshop on Cell Systems and Applications, 2008."},{"key":"e_1_3_2_1_24_1","volume-title":"Java concurrency in practice","author":"Peierls T.","year":"2006","unstructured":"T. Peierls , B. Goetz , J. Bloch , J. Bowbeer , D. Lea , and D. Holmes . Java concurrency in practice . 2006 . T. Peierls, B. Goetz, J. Bloch, J. Bowbeer, D. Lea, and D. Holmes. Java concurrency in practice. 2006."},{"key":"e_1_3_2_1_25_1","volume-title":"ICICDT","author":"Pham D.","year":"2005","unstructured":"D. Pham , S. Asano , M. Bolliger , M. Day , H. Hofstee , C. Johns , J. Kahle , A. Kameyama , J. Keaty , Y. Masubuchi , The design and implementation of a first-generation CELL processor--a multi-core SoC . In ICICDT , 2005 . D. Pham, S. Asano, M. Bolliger, M. Day, H. Hofstee, C. Johns, J. Kahle, A. Kameyama, J. Keaty, Y. Masubuchi, et al. The design and implementation of a first-generation CELL processor--a multi-core SoC. In ICICDT, 2005."},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1145\/1134760.1134773"},{"key":"e_1_3_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1145\/582034.582042"},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1145\/2567931"},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1145\/2602988.2602999"},{"key":"e_1_3_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICPPW.2010.65"},{"key":"e_1_3_2_1_31_1","volume-title":"CLUSTER","author":"Zhu W.","year":"2002","unstructured":"W. Zhu , C.-L. Wang , and F. C. M. Lau . JESSICA2 : A Distributed Java Virtual Machine with Transparent Thread Migration Support . In CLUSTER , 2002 . W. Zhu, C.-L. Wang, and F. C. M. Lau. JESSICA2: A Distributed Java Virtual Machine with Transparent Thread Migration Support. In CLUSTER, 2002."}],"event":{"name":"JTRES '16: 14th International Workshop on Java Technologies for Real-Time and Embedded Systems","acronym":"JTRES '16","location":"Lugano Switzerland"},"container-title":["Proceedings of the 14th International Workshop on Java Technologies for Real-Time and Embedded Systems"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2990509.2990510","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2990509.2990510","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T21:15:24Z","timestamp":1750281324000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2990509.2990510"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,8,29]]},"references-count":31,"alternative-id":["10.1145\/2990509.2990510","10.1145\/2990509"],"URL":"https:\/\/doi.org\/10.1145\/2990509.2990510","relation":{},"subject":[],"published":{"date-parts":[[2016,8,29]]},"assertion":[{"value":"2016-08-29","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}