{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,31]],"date-time":"2026-07-31T12:12:10Z","timestamp":1785499930946,"version":"3.56.0"},"reference-count":35,"publisher":"Association for Computing Machinery (ACM)","issue":"4","license":[{"start":{"date-parts":[[2016,10,25]],"date-time":"2016-10-25T00:00:00Z","timestamp":1477353600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Archit. Code Optim."],"published-print":{"date-parts":[[2016,12,28]]},"abstract":"<jats:p>\n            Hardware virtualization solutions provide users with benefits ranging from application isolation through server consolidation to improved disaster recovery and faster server provisioning. While hardware assistance for virtualization is supported by all major processor architectures, including Intel, ARM, PowerPC, and MIPS, these extensions are targeted at virtualization of the same architecture, for example, an x86 guest on an x86 host system. Existing techniques for cross-architecture virtualization, for example, an ARM guest on an x86 host, still incur a substantial overhead for CPU, memory, and I\/O virtualization due to the necessity for software emulation of these mismatched system components. In this article, we present a new hardware-accelerated hypervisor called C\n            <jats:sc>aptive<\/jats:sc>\n            , employing a range of novel techniques that exploit existing hardware virtualization extensions for improving the performance of full-system cross-platform virtualization. We illustrate how (1) guest memory management unit (MMU) events and operations can be mapped onto host memory virtualization extensions, eliminating the need for costly software MMU emulation, (2) a block-based dynamic binary translation engine inside the virtual machine can improve CPU virtualization performance, (3) memory-mapped guest I\/O can be efficiently translated to fast I\/O specific calls to emulated devices, and (4) the cost for asynchronous guest interrupts can be reduced. For an ARM-based Linux guest system running on an x86 host with Intel VT support, we demonstrate application performance levels, based on SPEC CPU2006 benchmarks, of up to 5.88\u00d7 over state-of-the-art Q\n            <jats:sc>emu<\/jats:sc>\n            and 2.5\u00d7 on average, achieving a guest dynamic instruction throughput of up to 1280 MIPS (million instructions per second) and 915.52 MIPS, on average.\n          <\/jats:p>","DOI":"10.1145\/2996798","type":"journal-article","created":{"date-parts":[[2016,10,26]],"date-time":"2016-10-26T13:20:01Z","timestamp":1477488001000},"page":"1-25","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":10,"title":["Hardware-Accelerated Cross-Architecture Full-System Virtualization"],"prefix":"10.1145","volume":"13","author":[{"given":"Tom","family":"Spink","sequence":"first","affiliation":[{"name":"University of Edinburgh, UK"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Harry","family":"Wagstaff","sequence":"additional","affiliation":[{"name":"University of Edinburgh, UK"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Bj\u00f6rn","family":"Franke","sequence":"additional","affiliation":[{"name":"University of Edinburgh, UK"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2016,10,25]]},"reference":[{"key":"e_1_2_1_1_1","unstructured":"AMD Developer Central. 2010. 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In Proceedings of the 1st Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO). Florian Brandner, Andreas Fellnhofer, Andreas Krall, and David Riegler. 2009. Fast and accurate simulation using the LLVM compiler framework. In Proceedings of the 1st Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO)."},{"key":"e_1_2_1_10_1","unstructured":"Jeffrey Buell Daniel Hecht Jin Heo Kalyan Saladi and H. Reza Taheri. 2013. Methodology for Performance Analysis of VMware vSphere under Tier-1 Applications. VMware technical journal. Retrieved from https:\/\/labs.vmware.com\/vmtj\/methodology-for-performance-analysis-of-vmware-vsphere- under-tier-1-applications.  Jeffrey Buell Daniel Hecht Jin Heo Kalyan Saladi and H. Reza Taheri. 2013. Methodology for Performance Analysis of VMware vSphere under Tier-1 Applications. VMware technical journal. Retrieved from https:\/\/labs.vmware.com\/vmtj\/methodology-for-performance-analysis-of-vmware-vsphere- under-tier-1-applications."},{"key":"e_1_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/1629435.1629438"},{"key":"e_1_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/2576195.2576201"},{"key":"e_1_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICPADS.2011.102"},{"key":"e_1_2_1_14_1","volume-title":"Proceedings of the Ottawa Linux Symposium.","author":"Ding Jiun-Hung","year":"2012","unstructured":"Jiun-Hung Ding , Chang-Jung Lin , Ping-Hao Chang , Chieh-Hao Tsang , Wei-Chung Hsu , and Yeh-Ching Chung . 2012 . ARMvisor: System virtualization for ARM . In Proceedings of the Ottawa Linux Symposium. Jiun-Hung Ding, Chang-Jung Lin, Ping-Hao Chang, Chieh-Hao Tsang, Wei-Chung Hsu, and Yeh-Ching Chung. 2012. ARMvisor: System virtualization for ARM. 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