{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,26]],"date-time":"2026-02-26T04:35:23Z","timestamp":1772080523294,"version":"3.50.1"},"reference-count":21,"publisher":"Association for Computing Machinery (ACM)","issue":"3","license":[{"start":{"date-parts":[[2017,4,20]],"date-time":"2017-04-20T00:00:00Z","timestamp":1492646400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["J. Emerg. Technol. Comput. Syst."],"published-print":{"date-parts":[[2017,7,31]]},"abstract":"<jats:p>Approximate computing is a promising technique for energy-efficient Very Large Scale Integration (VLSI) system design. It is best suited for error-resilient applications such as signal processing and multimedia. Approximate computing reduces accuracy but still provides significant and faster results with lower power consumption. This is attractive to arithmetic circuits. In this article, various novel design approaches of approximate 4-2 and 5-2 compressors have been proposed for reduction of the partial product stages in multiplication. Three approximate 8 \u00d7 8 Dadda multiplier designs using three novel approximate 4-2 compressors and two approximate 8 \u00d7 8 Dadda multiplier designs using two novel approximate 5-2 compressors have proposed. The synthesis results show that the proposed designs achieved significant accuracy improvement together with power and delay reductions compared to the existing approximate designs.<\/jats:p>","DOI":"10.1145\/3007649","type":"journal-article","created":{"date-parts":[[2017,4,20]],"date-time":"2017-04-20T12:05:21Z","timestamp":1492689921000},"page":"1-17","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":61,"title":["Design of Approximate Compressors for Multiplication"],"prefix":"10.1145","volume":"13","author":[{"given":"Anusha","family":"Gorantla","sequence":"first","affiliation":[{"name":"Government College of Technology in Coimbatore, Tamilnadu, India"}]},{"given":"Deepa","family":"P","sequence":"additional","affiliation":[{"name":"Government College of Technology in Coimbatore, Tamilnadu, India"}]}],"member":"320","published-online":{"date-parts":[[2017,4,20]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2014.6783335"},{"key":"e_1_2_1_2_1","volume-title":"Principles of Digital Image Processing: Fundamental Techniques","author":"Burger Wilhelm","edition":"1"},{"key":"e_1_2_1_3_1","first-page":"85","article-title":"Ultra-low-voltage, low-power CMOS 4-2 and 5-2 compressors for fast arithmetic circuits","volume":"51","author":"Chang C. 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Momeni J. Han P. Montuschi and F. Lombardi. 2015. Design and analysis of approximate compressors for multiplication. IEEE Trans. Comput. 984--994. DOI:http:\/\/dx.doi.org\/10.1109\/TC.2014.  A. Momeni J. Han P. Montuschi and F. Lombardi. 2015. Design and analysis of approximate compressors for multiplication. IEEE Trans. Comput. 984--994. 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